Simulated annealing applied to multicomputer task allocation and processor specification

This paper considers the design problems of processor specification and task allocation for embedded computer systems. A partitioning-based representation is proposed that allows these problems to be solved concurrently. An algorithm based on this representation is described that utilizes simulated...

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Bibliographic Details
Main Authors: Beck, J.E., Siewiorek, D.P.
Format: Conference Proceeding
Language:English
Subjects:
Automotive electronics
Computational modeling
Costs
Electronic equipment testing
Embedded computing
Hardware
Partitioning algorithms
Process design
Runtime
Simulated annealing
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Summary:This paper considers the design problems of processor specification and task allocation for embedded computer systems. A partitioning-based representation is proposed that allows these problems to be solved concurrently. An algorithm based on this representation is described that utilizes simulated annealing coupled with a heuristic processor specification technique. This algorithm, named SA2, is compared against three baseline algorithms on a combination of real and synthetic test cases with respect to two figures of merit: hardware cost and run-time. The real test cases are based on commercially developed automotive electronic applications and the baseline algorithms represent a mixture of heuristic approaches with varying degrees of sophistication. For all test cases, SA2 is found to generate near optimal solutions, and the relative trade-off between solution quality and run-time exhibited by the algorithms is quantified and analyzed.
DOI:10.1109/SPDP.1996.570339