Coverage method for FPGA fault logic blocks by spares

A fault coverage method for digital system-on-chip by means of traversal the logic block matrix to repair the FPGA components is proposed. A method enables to obtain the solution in the form of quasioptimal coverage for all faulty blocks by minimum number of spare tiles. A choice one of two traversa...

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Bibliographic Details
Main Authors: Hahanov, V, Litvinova, E, Gharibi, W, Guz, O
Format: Conference Proceeding
Language:English
Subjects:
Circuit faults
Field programmable gate arrays
Maintenance engineering
Radiation detectors
Software
System-on-a-chip
Tiles
Online Access:Request full text
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Summary:A fault coverage method for digital system-on-chip by means of traversal the logic block matrix to repair the FPGA components is proposed. A method enables to obtain the solution in the form of quasioptimal coverage for all faulty blocks by minimum number of spare tiles. A choice one of two traversal strategies for rows or columns of a logic block matrix on the basis of the structurization criteria, which determine a number of faulty blocks, reduced to the unit modified matrix of rows or columns is realized.
DOI:10.1109/EWDTS.2010.5742089