Fixed-point co-design in DSP

Fixed-point implementation of DSP algorithms is attractive from the viewpoints of simplicity, cost-effectiveness and performance. Two problems confront the designer-(i) Lack of efficient compilers from high level languages to assembler for fixed-point DSPs, and (ii) Limited capabilities for automate...

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Main Authors: Egolf, T.W., Famorzadeh, S., Madisetti, V.K.
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Application specific integrated circuits
Assembly systems
Digital signal processing
Digital signal processing chips
Hardware
High level languages
Signal processing algorithms
Software prototyping
Virtual prototyping
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creator Egolf, T.W.
Famorzadeh, S.
Madisetti, V.K.
description Fixed-point implementation of DSP algorithms is attractive from the viewpoints of simplicity, cost-effectiveness and performance. Two problems confront the designer-(i) Lack of efficient compilers from high level languages to assembler for fixed-point DSPs, and (ii) Limited capabilities for automated systems design, rapid simulation, verification, and prototyping of fixed-point algorithms. This paper discusses recent efforts at the DSP Laboratory at Georgia Tech that address these problems within the VHDL library-based QuickFix environment.
doi_str_mv 10.1109/VLSISP.1994.574736
format conference_proceeding
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subjects Algorithm design and analysis
Application specific integrated circuits
Assembly systems
Digital signal processing
Digital signal processing chips
Hardware
High level languages
Signal processing algorithms
Software prototyping
Virtual prototyping
title Fixed-point co-design in DSP
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