Low complexity CMOS MIN circuit for low voltage applications

In this work, a new MIN circuit for low voltage applications is presented. The approach uses a new low output impedance configuration which allows working with low power supply requirements. The circuit was simulated in PSpice and a chip prototype was fabricated and tested using CMOS AMI 0.5μm N-wel...

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Bibliographic Details
Main Authors: Molinar-Solis, J E, Garcia-Lozano, R Z, Morales-Ramirez, A
Format: Conference Proceeding
Language:English
Subjects:
CMOS integrated circuits
Impedance
Integrated circuit modeling
Low voltage
Semiconductor device modeling
Transistors
Online Access:Request full text
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Summary:In this work, a new MIN circuit for low voltage applications is presented. The approach uses a new low output impedance configuration which allows working with low power supply requirements. The circuit was simulated in PSpice and a chip prototype was fabricated and tested using CMOS AMI 0.5μm N-well technology.
DOI:10.1109/LASCAS.2011.5750282