Development of Low-Noise Front-End ASIC for Hybrid CdTe Pixel Detectors

A front-end ASIC with spectroscopic capability was developed to construct a prototype CdTe pixel detector for future use in focusing hard X-ray telescopes. The ASIC is designed for a hybrid configuration, where each CdTe sensor pixel is vertically connected to a corresponding pixel cell fabricated i...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2011-06, Vol.58 (3), p.1370-1375
Main Authors: Sato, Goro, Kishishita, Tetsuichi, Ikeda, Hirokazu, Sakumura, Takuto, Takahashi, Tadayuki
Format: Article
Language:English
Subjects:
Analog front-end
Application specific integrated circuits
ASIC
Cadmium tellurides
CdTe
CdZnTe
Charge distribution
Chips
Detectors
Electrodes
FETs
Focusing
gamma-ray
Logic gates
low noise
Noise
Pixel
Pixels
Prototypes
Spectra
VLSI
X-ray
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Description
Summary:A front-end ASIC with spectroscopic capability was developed to construct a prototype CdTe pixel detector for future use in focusing hard X-ray telescopes. The ASIC is designed for a hybrid configuration, where each CdTe sensor pixel is vertically connected to a corresponding pixel cell fabricated in the readout ASIC. The readout chip consists of a 12 × 12 matrix of identical 270×270 μm 2 pixel cells, and was implemented with TSMC 0.35 μm CMOS technology. The low noise performance achieved an equivalent noise charge distribution of 50 ±10 e - . A CdTe pixel detector was mounted on the ASIC using an In/Au-stud bump-bonding technique. The detector was operated in self-trigger mode, and showed good spectral performance with energy resolution of 870 eV (FWHM) at 59.5 keV.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2011.2135865