Reconfigurable Cryptographic Processor for multiple crypto-algorithms

• Main Authors: Megalingam, R K, Joseph, I P, Gautham, P, Parthasarathy, R, Deepu, K B, Nair, M M
• Format: Conference Proceeding
• Language: English
• Subjects: Algorithm design and analysis; Application specific integrated circuits; Cryptography; datapath; Field programmable gate arrays; Hardware; reconfigurable; Software algorithms; Testing
• DOI: 10.1109/TECHSYM.2011.5783846

In today's world there is a growing demand for real-time implementation of cryptographic algorithms which are being used in secure communication systems, networks and security systems. Traditional computing techniques involved the use of application specific integrated circuits to achieve high performance but with extremely inflexible hardware design meanwhile the flexibility of hardware design was achieved at the cost of slow processing by using general purpose processors. In this research paper a novel reconfigurable processor architecture has been presented for cryptographic applications that bridges the above mentioned gap and also sustains implementations that can show equal or even better performance results than custom-hardware and hitherto preserves all the flexibility of general-purpose processors. We present implementations for representative algorithms of block cipher such as Rijndael, RC5 and RC6 on our architecture. The RTL Description is done in ModelSim using Verilog HDL and the results are synthesized in Synopsys. This work presents an emerging reconfigurable hardware that potentially delivers flexible high performance for cryptographic algorithms.