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On the cyclic threshold voltage shift of dynamic negative-bias temperature instability
Based on new experimental evidence for the cyclical threshold voltage shift (ΔV t ) under dynamic NBTI and a recent ab-initio study on the oxygen vacancy defects (hole traps) in the SiO 2 , an improved physical hole-trapping model for dynamic NBTI involving the E δ ' center is proposed. This mo...
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creator | Teo, Z Q Boo, A A Ang, D S Leong, K C |
description | Based on new experimental evidence for the cyclical threshold voltage shift (ΔV t ) under dynamic NBTI and a recent ab-initio study on the oxygen vacancy defects (hole traps) in the SiO 2 , an improved physical hole-trapping model for dynamic NBTI involving the E δ ' center is proposed. This model stipulates that the hole-trap precursor (i.e. the Si-Si dimer) responsible for the cyclic ΔV t only undergoes marginal structural relaxation under typical NBTI stress condition, such that the Si-Si bond is completely re-formed when the stress is terminated. This framework is subtly different from an existing one based on the earlier HDL model. The latter assumes that the switching hole traps are oxygen vacancy defects that have undergone significant structural relaxation and that the switching behavior is due to the repetitive transitions between the positively charged state and the charge-compensated state. Experimental results obtained from higher oxide-field stressing in fact do not support this proposition. |
doi_str_mv | 10.1109/IRPS.2011.5784611 |
format | conference_proceeding |
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This model stipulates that the hole-trap precursor (i.e. the Si-Si dimer) responsible for the cyclic ΔV t only undergoes marginal structural relaxation under typical NBTI stress condition, such that the Si-Si bond is completely re-formed when the stress is terminated. This framework is subtly different from an existing one based on the earlier HDL model. The latter assumes that the switching hole traps are oxygen vacancy defects that have undergone significant structural relaxation and that the switching behavior is due to the repetitive transitions between the positively charged state and the charge-compensated state. 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This model stipulates that the hole-trap precursor (i.e. the Si-Si dimer) responsible for the cyclic ΔV t only undergoes marginal structural relaxation under typical NBTI stress condition, such that the Si-Si bond is completely re-formed when the stress is terminated. This framework is subtly different from an existing one based on the earlier HDL model. The latter assumes that the switching hole traps are oxygen vacancy defects that have undergone significant structural relaxation and that the switching behavior is due to the repetitive transitions between the positively charged state and the charge-compensated state. Experimental results obtained from higher oxide-field stressing in fact do not support this proposition.</description><subject>Bias temperature instability</subject><subject>Charge carrier processes</subject><subject>Hardware design languages</subject><subject>hole trapping</subject><subject>interface states</subject><subject>Logic gates</subject><subject>pulsed I-V</subject><subject>recovery ultra-fast measurement</subject><subject>Silicon</subject><subject>Stress</subject><subject>Switches</subject><subject>Threshold voltage</subject><issn>1541-7026</issn><issn>1938-1891</issn><isbn>1424491134</isbn><isbn>9781424491131</isbn><isbn>9781424491117</isbn><isbn>1424491118</isbn><isbn>1424491126</isbn><isbn>9781424491124</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1kMtqwzAURNUXNEnzAaUb_YBTXUu2dZcl9BEIpLSh2yBZV7GK4wRLDfjvG2i6moFzmMUwdg9iBiDwcfHx_jnLBcCsqLQqAS7YFCsNKlcKAaC6ZCNAqTPQCFds_A-kuj6BQkFWiby8ZeMYv4XIhdTliH2tOp4a4vVQt6E-1Z5is28dP-7bZLbEYxN84nvP3dCZ3UnpaGtSOFJmg4k80e5AvUk_PfHQxWRsaEMa7tiNN22k6TknbP3yvJ6_ZcvV62L-tMwCipRZ76QgxLJwxgOUdSWwUrJABKvAK2uFJQOFcBpqrV2B4KwrBRrrrAcnJ-zhbzYQ0ebQh53ph835HvkLo2VWmw</recordid><startdate>201104</startdate><enddate>201104</enddate><creator>Teo, Z Q</creator><creator>Boo, A A</creator><creator>Ang, D S</creator><creator>Leong, K C</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201104</creationdate><title>On the cyclic threshold voltage shift of dynamic negative-bias temperature instability</title><author>Teo, Z Q ; Boo, A A ; Ang, D S ; Leong, K C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-bfd30e9965daf116c7097435991b41f4bb0bea150d81c88d591dbd609abdbf1d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Bias temperature instability</topic><topic>Charge carrier processes</topic><topic>Hardware design languages</topic><topic>hole trapping</topic><topic>interface states</topic><topic>Logic gates</topic><topic>pulsed I-V</topic><topic>recovery ultra-fast measurement</topic><topic>Silicon</topic><topic>Stress</topic><topic>Switches</topic><topic>Threshold voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Teo, Z Q</creatorcontrib><creatorcontrib>Boo, A A</creatorcontrib><creatorcontrib>Ang, D S</creatorcontrib><creatorcontrib>Leong, K C</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Teo, Z Q</au><au>Boo, A A</au><au>Ang, D S</au><au>Leong, K C</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>On the cyclic threshold voltage shift of dynamic negative-bias temperature instability</atitle><btitle>2011 International Reliability Physics Symposium</btitle><stitle>IRPS</stitle><date>2011-04</date><risdate>2011</risdate><spage>XT.10.1</spage><epage>XT.10.5</epage><pages>XT.10.1-XT.10.5</pages><issn>1541-7026</issn><eissn>1938-1891</eissn><isbn>1424491134</isbn><isbn>9781424491131</isbn><eisbn>9781424491117</eisbn><eisbn>1424491118</eisbn><eisbn>1424491126</eisbn><eisbn>9781424491124</eisbn><abstract>Based on new experimental evidence for the cyclical threshold voltage shift (ΔV t ) under dynamic NBTI and a recent ab-initio study on the oxygen vacancy defects (hole traps) in the SiO 2 , an improved physical hole-trapping model for dynamic NBTI involving the E δ ' center is proposed. This model stipulates that the hole-trap precursor (i.e. the Si-Si dimer) responsible for the cyclic ΔV t only undergoes marginal structural relaxation under typical NBTI stress condition, such that the Si-Si bond is completely re-formed when the stress is terminated. This framework is subtly different from an existing one based on the earlier HDL model. The latter assumes that the switching hole traps are oxygen vacancy defects that have undergone significant structural relaxation and that the switching behavior is due to the repetitive transitions between the positively charged state and the charge-compensated state. Experimental results obtained from higher oxide-field stressing in fact do not support this proposition.</abstract><pub>IEEE</pub><doi>10.1109/IRPS.2011.5784611</doi></addata></record> |
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issn | 1541-7026 1938-1891 |
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subjects | Bias temperature instability Charge carrier processes Hardware design languages hole trapping interface states Logic gates pulsed I-V recovery ultra-fast measurement Silicon Stress Switches Threshold voltage |
title | On the cyclic threshold voltage shift of dynamic negative-bias temperature instability |
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