A design methodology for system level synthesis of multi-core system architectures

A multi-core system is an integrated circuit containing multiple processor cores that implements most of the functionality of a complex electronic system and some other components like FPGA/ASIC on a single chip. In this paper, we present a novel approach to synthesize multi-core system architecture...

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Bibliographic Details
Main Authors: Yehia, K, Safar, M, Youness, H, AbdElSalam, M, Salem, A
Format: Conference Proceeding
Language:English
Subjects:
Engines
Multicore processing
Optimal scheduling
Partitioning algorithms
Processor scheduling
Scheduling
Online Access:Request full text
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Summary:A multi-core system is an integrated circuit containing multiple processor cores that implements most of the functionality of a complex electronic system and some other components like FPGA/ASIC on a single chip. In this paper, we present a novel approach to synthesize multi-core system architectures from Task Precedence Graphs (TPG) models. The front end engine applies efficient algorithm for scheduling and communication contention resolving to obtain the optimal multi-core system architecture in terms of number of processor cores, number of busses, task-to-processor/channel-to-bus mapping, optimal schedule, and HW/SW partition. The back end engine generates a SystemC simulation model using a well-known commercial tool model generation library. The viability and potential of the approach is demonstrated by a case study.
DOI:10.1109/SIECPC.2011.5876883