An embedded hardware architecture for GPC-on-Chip applied to automotive active suspension systems

This paper presents a hardware architecture for an embedded real-time generalized predictive control (GPC) algorithm based on the state-of-the-art Customizable Advanced Processor (CAP9) technology from Atmel; targeting automotive active suspension systems. The GPC algorithm relies on the solution of...

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Bibliographic Details
Main Authors: Shoukry, Y, El-Kharashi, M W, Shokry, H, Hammad, S
Format: Conference Proceeding
Language:English
Subjects:
Active suspension systems
Automotive engineering
Computer architecture
embedded control systems
generalized predictive control
Matrix decomposition
Prediction algorithms
Random access memory
Real time systems
software-hardware codesign
Suspensions
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Summary:This paper presents a hardware architecture for an embedded real-time generalized predictive control (GPC) algorithm based on the state-of-the-art Customizable Advanced Processor (CAP9) technology from Atmel; targeting automotive active suspension systems. The GPC algorithm relies on the solution of an optimization problem at every sampling period. Profiling shows that matrix operations consume the largest portion of the computation requirements of the algorithm. The proposed embedded system utilizes a systolic-array based matrix co-processor in order to accelerate matrix operations. The proposed embedded system is designed to fit within the proposed platform while meeting tight real-time constraints imposed by the automotive active suspension systems.
DOI:10.1109/SIECPC.2011.5876912