A double-polysilicon self-aligned npn bipolar process (ADRF) with optional NMOS transistors for RF and microwave applications

A silicon bipolar process for RF and microwave applications, which features 25-GHz double-polysilicon self-aligned npn bipolar transistors with 5.5-V BV/sub CEO/, optional 0.7-/spl mu/m NMOS transistors with p/sup +/ polysilicon gate for switch applications, lateral pnp transistors, high and low val...

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Bibliographic Details
Main Authors: O, K., Garone, P., Tsai, C., Scharf, B., Higgins, M., Mai, D., Kermarrec, C., Yasaitis, J.
Format: Conference Proceeding
Language:English
Subjects:
Bipolar transistors
Capacitors
Microwave transistors
MOSFETs
Plugs
Radio frequency
Radiofrequency amplifiers
Resistors
Silicon
Switches
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Description
Summary:A silicon bipolar process for RF and microwave applications, which features 25-GHz double-polysilicon self-aligned npn bipolar transistors with 5.5-V BV/sub CEO/, optional 0.7-/spl mu/m NMOS transistors with p/sup +/ polysilicon gate for switch applications, lateral pnp transistors, high and low valued resistors, and p/sup +/ polysilicon-to-n/sup +/ plug capacitors, is described. The npn transistors utilize nitride-oxide composite spacers formed using sacrificial TEOS spacers. The RF and microwave capabilities of the process up to several GHz are demonstrated by fabricating and characterizing RF amplifiers, low noise amplifiers, and RF switches.
DOI:10.1109/BIPOL.1994.587899