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A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit

This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase d...

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Main Authors: Fan-Ta Chen, Min-Sheng Kao, Yu-Hao Hsu, Chih-Hsing Lin, Jen-Ming Wu, Ching-Te Chiu, Shuo-Hung Hsu
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Language:English
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creator Fan-Ta Chen
Min-Sheng Kao
Yu-Hao Hsu
Chih-Hsing Lin
Jen-Ming Wu
Ching-Te Chiu
Shuo-Hung Hsu
description This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply.
doi_str_mv 10.1109/ISCAS.2011.5937532
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fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5937532</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5937532</ieee_id><sourcerecordid>5937532</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-abc13a1f94f5cf5a48e501a3be9dc81d03fe68effa08bf93939ea4424996a18f3</originalsourceid><addsrcrecordid>eNpFUNtKw0AUXG9grf0BfdkfSN2zl2T3MRRtCwXB6nM53ZzFaEzqZivUrzdiwRmGeRgYmGHsBsQUQLi75XpWrqdSAEyNU4VR8oRdgZZaO11oc8pGEozNwEhz9h-o4pyNhCwg00rISzbp-zcxIM-tLfSIPZUcBE8d_62dL7557BKmumux4btX7IljW_EQ6XNPrT_wihL51EUeBvmm8-88ku--KB64r6Pf1-maXQRsepocfcxeHu6fZ4ts9ThfzspVVkNhUoZbDwohOB2MDwa1JSMA1ZZc5S1UQgXKLYWAwm6DUwMJ9TDLuRzBBjVmt3-9NRFtdrH-wHjYHL9RPzLRU7k</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Fan-Ta Chen ; Min-Sheng Kao ; Yu-Hao Hsu ; Chih-Hsing Lin ; Jen-Ming Wu ; Ching-Te Chiu ; Shuo-Hung Hsu</creator><creatorcontrib>Fan-Ta Chen ; Min-Sheng Kao ; Yu-Hao Hsu ; Chih-Hsing Lin ; Jen-Ming Wu ; Ching-Te Chiu ; Shuo-Hung Hsu</creatorcontrib><description>This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply.</description><identifier>ISSN: 0271-4302</identifier><identifier>ISBN: 1424494737</identifier><identifier>ISBN: 9781424494736</identifier><identifier>EISSN: 2158-1525</identifier><identifier>EISBN: 1424494745</identifier><identifier>EISBN: 9781424494729</identifier><identifier>EISBN: 9781424494743</identifier><identifier>EISBN: 1424494729</identifier><identifier>DOI: 10.1109/ISCAS.2011.5937532</identifier><language>eng</language><publisher>IEEE</publisher><subject>Clocks ; Detectors ; Frequency locked loops ; Phase frequency detector ; Phase locked loops ; Time frequency analysis ; Voltage-controlled oscillators</subject><ispartof>2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, p.185-188</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5937532$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54555,54920,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5937532$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fan-Ta Chen</creatorcontrib><creatorcontrib>Min-Sheng Kao</creatorcontrib><creatorcontrib>Yu-Hao Hsu</creatorcontrib><creatorcontrib>Chih-Hsing Lin</creatorcontrib><creatorcontrib>Jen-Ming Wu</creatorcontrib><creatorcontrib>Ching-Te Chiu</creatorcontrib><creatorcontrib>Shuo-Hung Hsu</creatorcontrib><title>A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit</title><title>2011 IEEE International Symposium of Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply.</description><subject>Clocks</subject><subject>Detectors</subject><subject>Frequency locked loops</subject><subject>Phase frequency detector</subject><subject>Phase locked loops</subject><subject>Time frequency analysis</subject><subject>Voltage-controlled oscillators</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>1424494737</isbn><isbn>9781424494736</isbn><isbn>1424494745</isbn><isbn>9781424494729</isbn><isbn>9781424494743</isbn><isbn>1424494729</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpFUNtKw0AUXG9grf0BfdkfSN2zl2T3MRRtCwXB6nM53ZzFaEzqZivUrzdiwRmGeRgYmGHsBsQUQLi75XpWrqdSAEyNU4VR8oRdgZZaO11oc8pGEozNwEhz9h-o4pyNhCwg00rISzbp-zcxIM-tLfSIPZUcBE8d_62dL7557BKmumux4btX7IljW_EQ6XNPrT_wihL51EUeBvmm8-88ku--KB64r6Pf1-maXQRsepocfcxeHu6fZ4ts9ThfzspVVkNhUoZbDwohOB2MDwa1JSMA1ZZc5S1UQgXKLYWAwm6DUwMJ9TDLuRzBBjVmt3-9NRFtdrH-wHjYHL9RPzLRU7k</recordid><startdate>201105</startdate><enddate>201105</enddate><creator>Fan-Ta Chen</creator><creator>Min-Sheng Kao</creator><creator>Yu-Hao Hsu</creator><creator>Chih-Hsing Lin</creator><creator>Jen-Ming Wu</creator><creator>Ching-Te Chiu</creator><creator>Shuo-Hung Hsu</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201105</creationdate><title>A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit</title><author>Fan-Ta Chen ; Min-Sheng Kao ; Yu-Hao Hsu ; Chih-Hsing Lin ; Jen-Ming Wu ; Ching-Te Chiu ; Shuo-Hung Hsu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-abc13a1f94f5cf5a48e501a3be9dc81d03fe68effa08bf93939ea4424996a18f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Clocks</topic><topic>Detectors</topic><topic>Frequency locked loops</topic><topic>Phase frequency detector</topic><topic>Phase locked loops</topic><topic>Time frequency analysis</topic><topic>Voltage-controlled oscillators</topic><toplevel>online_resources</toplevel><creatorcontrib>Fan-Ta Chen</creatorcontrib><creatorcontrib>Min-Sheng Kao</creatorcontrib><creatorcontrib>Yu-Hao Hsu</creatorcontrib><creatorcontrib>Chih-Hsing Lin</creatorcontrib><creatorcontrib>Jen-Ming Wu</creatorcontrib><creatorcontrib>Ching-Te Chiu</creatorcontrib><creatorcontrib>Shuo-Hung Hsu</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fan-Ta Chen</au><au>Min-Sheng Kao</au><au>Yu-Hao Hsu</au><au>Chih-Hsing Lin</au><au>Jen-Ming Wu</au><au>Ching-Te Chiu</au><au>Shuo-Hung Hsu</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit</atitle><btitle>2011 IEEE International Symposium of Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2011-05</date><risdate>2011</risdate><spage>185</spage><epage>188</epage><pages>185-188</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>1424494737</isbn><isbn>9781424494736</isbn><eisbn>1424494745</eisbn><eisbn>9781424494729</eisbn><eisbn>9781424494743</eisbn><eisbn>1424494729</eisbn><abstract>This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2011.5937532</doi><tpages>4</tpages></addata></record>
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identifier ISSN: 0271-4302
ispartof 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, p.185-188
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2158-1525
language eng
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Clocks
Detectors
Frequency locked loops
Phase frequency detector
Phase locked loops
Time frequency analysis
Voltage-controlled oscillators
title A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T06%3A49%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%2010%20to%2011.5GHz%20rotational%20phase%20and%20frequency%20detector%20for%20clock%20recovery%20circuit&rft.btitle=2011%20IEEE%20International%20Symposium%20of%20Circuits%20and%20Systems%20(ISCAS)&rft.au=Fan-Ta%20Chen&rft.date=2011-05&rft.spage=185&rft.epage=188&rft.pages=185-188&rft.issn=0271-4302&rft.eissn=2158-1525&rft.isbn=1424494737&rft.isbn_list=9781424494736&rft_id=info:doi/10.1109/ISCAS.2011.5937532&rft.eisbn=1424494745&rft.eisbn_list=9781424494729&rft.eisbn_list=9781424494743&rft.eisbn_list=1424494729&rft_dat=%3Cieee_6IE%3E5937532%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-abc13a1f94f5cf5a48e501a3be9dc81d03fe68effa08bf93939ea4424996a18f3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5937532&rfr_iscdi=true