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A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit
This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase d...
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creator | Fan-Ta Chen Min-Sheng Kao Yu-Hao Hsu Chih-Hsing Lin Jen-Ming Wu Ching-Te Chiu Shuo-Hung Hsu |
description | This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply. |
doi_str_mv | 10.1109/ISCAS.2011.5937532 |
format | conference_proceeding |
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A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. 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The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply.</description><subject>Clocks</subject><subject>Detectors</subject><subject>Frequency locked loops</subject><subject>Phase frequency detector</subject><subject>Phase locked loops</subject><subject>Time frequency analysis</subject><subject>Voltage-controlled oscillators</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>1424494737</isbn><isbn>9781424494736</isbn><isbn>1424494745</isbn><isbn>9781424494729</isbn><isbn>9781424494743</isbn><isbn>1424494729</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpFUNtKw0AUXG9grf0BfdkfSN2zl2T3MRRtCwXB6nM53ZzFaEzqZivUrzdiwRmGeRgYmGHsBsQUQLi75XpWrqdSAEyNU4VR8oRdgZZaO11oc8pGEozNwEhz9h-o4pyNhCwg00rISzbp-zcxIM-tLfSIPZUcBE8d_62dL7557BKmumux4btX7IljW_EQ6XNPrT_wihL51EUeBvmm8-88ku--KB64r6Pf1-maXQRsepocfcxeHu6fZ4ts9ThfzspVVkNhUoZbDwohOB2MDwa1JSMA1ZZc5S1UQgXKLYWAwm6DUwMJ9TDLuRzBBjVmt3-9NRFtdrH-wHjYHL9RPzLRU7k</recordid><startdate>201105</startdate><enddate>201105</enddate><creator>Fan-Ta Chen</creator><creator>Min-Sheng Kao</creator><creator>Yu-Hao Hsu</creator><creator>Chih-Hsing Lin</creator><creator>Jen-Ming Wu</creator><creator>Ching-Te Chiu</creator><creator>Shuo-Hung Hsu</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201105</creationdate><title>A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit</title><author>Fan-Ta Chen ; Min-Sheng Kao ; Yu-Hao Hsu ; Chih-Hsing Lin ; Jen-Ming Wu ; Ching-Te Chiu ; Shuo-Hung Hsu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-abc13a1f94f5cf5a48e501a3be9dc81d03fe68effa08bf93939ea4424996a18f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Clocks</topic><topic>Detectors</topic><topic>Frequency locked loops</topic><topic>Phase frequency detector</topic><topic>Phase locked loops</topic><topic>Time frequency analysis</topic><topic>Voltage-controlled oscillators</topic><toplevel>online_resources</toplevel><creatorcontrib>Fan-Ta Chen</creatorcontrib><creatorcontrib>Min-Sheng Kao</creatorcontrib><creatorcontrib>Yu-Hao Hsu</creatorcontrib><creatorcontrib>Chih-Hsing Lin</creatorcontrib><creatorcontrib>Jen-Ming Wu</creatorcontrib><creatorcontrib>Ching-Te Chiu</creatorcontrib><creatorcontrib>Shuo-Hung Hsu</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fan-Ta Chen</au><au>Min-Sheng Kao</au><au>Yu-Hao Hsu</au><au>Chih-Hsing Lin</au><au>Jen-Ming Wu</au><au>Ching-Te Chiu</au><au>Shuo-Hung Hsu</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit</atitle><btitle>2011 IEEE International Symposium of Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2011-05</date><risdate>2011</risdate><spage>185</spage><epage>188</epage><pages>185-188</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>1424494737</isbn><isbn>9781424494736</isbn><eisbn>1424494745</eisbn><eisbn>9781424494729</eisbn><eisbn>9781424494743</eisbn><eisbn>1424494729</eisbn><abstract>This paper presents a 10.0-11.5 Gb/s full-rate phase and frequency detector integrated with the clock recovery circuit (CRC) for application in optical receivers. A rotational phase and frequency detector (RPFD) without external reference clock is proposed to train the conventional bang-bang phase detector (BBPD) to capture the clock frequency. The proposed RPFD shows 1.5 GHz capture range and works in the high speed data rate of 10 Gb/s. Only one closed loop is used to track the internal clock. The acquisition time for the clock frequency to adjust from 11.5 to 10 GHz is 160 ns. The fabricated chip occupies 0.7 mm in 90 nm CMOS process with -108.8 dBc/Hz at 1-MHz offset and consumes 52 mW power with 1.0-V supply.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2011.5937532</doi><tpages>4</tpages></addata></record> |
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identifier | ISSN: 0271-4302 |
ispartof | 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, p.185-188 |
issn | 0271-4302 2158-1525 |
language | eng |
recordid | cdi_ieee_primary_5937532 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Clocks Detectors Frequency locked loops Phase frequency detector Phase locked loops Time frequency analysis Voltage-controlled oscillators |
title | A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit |
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