A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS

A ΣΔ ADC with both Signal Transfer Function (STF) and Noise Transfer Function (NTF) optimized for GSM/EDGE application is presented. A direct-feedforward single-loop filter is used to improve linearity of the modulator at low supply voltage. From the edge of the signal bandwidth to over 1MHz of band...

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Main Authors: Fakhoury, Hussein, Jabbour, Chadi, Khushk, Hasham, Nguyen, Van-Tam, Loumeau, Patrick
Format: Conference Proceeding
Language:English
Subjects:
Bandwidth
Clocks
CMOS integrated circuits
GSM
Modulation
Noise
Transistors
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creator Fakhoury, Hussein
Jabbour, Chadi
Khushk, Hasham
Nguyen, Van-Tam
Loumeau, Patrick
description A ΣΔ ADC with both Signal Transfer Function (STF) and Noise Transfer Function (NTF) optimized for GSM/EDGE application is presented. A direct-feedforward single-loop filter is used to improve linearity of the modulator at low supply voltage. From the edge of the signal bandwidth to over 1MHz of band, measured STF is flat and in-band ripple is less than O.OldB. Clocked @ 26MHz the modulator achieves 82dB dynamic-range, 80dB peak SNR, -85dB peak THD, 88dBc peak SFDR. Implemented in 65-nm CMOS, it consumes 1.74mW from the 1.2V supply and occupies an active die area of 0.081mm2 (395μm×205μm) without voltage references.
doi_str_mv 10.1109/ISCAS.2011.5937764
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source IEEE Xplore All Conference Series
subjects Bandwidth
Clocks
CMOS integrated circuits
GSM
Modulation
Noise
Transistors
title A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS
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