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An ultra low voltage ultra high gain CMOS LNA using forward body biasing technique

A fully integrated 1.5 GHz low noise amplifier suitable for ultra-low voltage applications is designed and simulated in a standard 0.18μm CMOS technology. Using the folded cascode topology and forward body biasing technique, the proposed LNA works at a very low supply voltage and low power consumpti...

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Bibliographic Details
Main Authors: Kargaran, E., Nabovati, G., Baghbanmanesh, M. R., Mafinezhad, K., Nabovati, H.
Format: Conference Proceeding
Language:English
Subjects:
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Summary:A fully integrated 1.5 GHz low noise amplifier suitable for ultra-low voltage applications is designed and simulated in a standard 0.18μm CMOS technology. Using the folded cascode topology and forward body biasing technique, the proposed LNA works at a very low supply voltage and low power consumption. The proposed LNA has a power gain (S 21 ) of 22 dB with a noise figure of 1.9 dB, while consuming 2.5mW dc power with an ultra low supply voltage of 0.5 V.
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2011.6026335