Optimal body biasing for maximizing circuit performance in 65nm CMOS technology

In this paper, the effect of body-biasing technique in 65nm CMOS technology is investigated. The optimum body voltage in different process corners to get the maximum ON current is acquired using ST 65nm technology. The effectiveness of body biasing technique is investigated for sub- and super-thresh...

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Bibliographic Details
Main Authors: Moradi, F., Tuan Vu Cao, Wisland, D. T., Aunet, S., Mahmoodi, H.
Format: Conference Proceeding
Language:English
Subjects:
65nm
Body-biasing
CMOS integrated circuits
CMOS technology
Equations
MOS devices
nano-scale
Reduced instruction set computing
sub-threshold
Transistors
Wireless communication
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Summary:In this paper, the effect of body-biasing technique in 65nm CMOS technology is investigated. The optimum body voltage in different process corners to get the maximum ON current is acquired using ST 65nm technology. The effectiveness of body biasing technique is investigated for sub- and super-threshold designs. We show that for higher supply voltages, there is an optimum body voltage to get the maximum performance. The results for some Flip-Flops are shown.
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2011.6026651