Narrow-Width Effects on a Body-Tied Partially Depleted SOI MOSFET

In this paper, we present the investigation of narrow-width effects (NWEs) on partially depleted (PD) silicon-on-insulator (SOI) with different gate shape topologies. Based on dc/ac measurements and TCAD simulations, it shows detailed clarifications of body-tied-induced NWEs. The overall study demon...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2011-11, Vol.58 (11), p.3793-3800
Main Authors: Valentin, R., Bertrand, G., Puget, S., Scheer, P., Juge, A., Jaouen, H., Raynaud, C.
Format: Article
Language:English
Subjects:
65 nm
Applied sciences
Body contact
body tied
Contact
Contacts
Depletion
Electronics
Exact sciences and technology
Gates
Logic gates
Mathematical analysis
MOSFET
MOSFET circuits
MOSFETs
narrow-width effects (NWEs)
partially depleted (PD)
Semiconductor devices
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Shape
Silicon on insulator technology
silicon-on-insulator (SOI)
Topology
Transistors
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Summary:In this paper, we present the investigation of narrow-width effects (NWEs) on partially depleted (PD) silicon-on-insulator (SOI) with different gate shape topologies. Based on dc/ac measurements and TCAD simulations, it shows detailed clarifications of body-tied-induced NWEs. The overall study demonstrates relationship between gate shape topologies, body-tied shape, and electrical width of the transistor. Provided physical-based analytical models are able to capture peak GM and C GG as function of gate length, transistor width, physical gate-overlap width, and number of body tied. This results in improving the overall model accuracy of body contact and floating-body PD SOI MOSFETs.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2011.2165283