D0 muon readout electronics design

The readout electronics designed for the DO Muon Upgrade are described. These electronics serve three detector subsystems and one trigger system. The front-ends and readout hardware are synchronized by means of timing signals broadcast from the DO Trigger Framework. The front-end electronics have co...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 1997-06, Vol.44 (3), p.363-369
Main Authors: Baldin, B., Bardon, O., Fitzpatrick, T., Golovtsov, V., Hansen, S., Larwill, M., Los, S., Matveev, M., Neustroev, P., Podstavkov, V., Rotolo, C., Uvarov, L., Vaniev, V., Wood, D.
Format: Article
Language:English
Subjects:
Broadcasting
Computer buffers
Detectors
Digital signal processing
Electronic equipment testing
Hardware
Mesons
Process control
Readout electronics
Timing
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Summary:The readout electronics designed for the DO Muon Upgrade are described. These electronics serve three detector subsystems and one trigger system. The front-ends and readout hardware are synchronized by means of timing signals broadcast from the DO Trigger Framework. The front-end electronics have continuously running digitizers and two levels of buffering resulting in nearly deadtimeless operation. The raw data is corrected and formatted by 16-bit fixed point DSP processors. These processors also perform control of the data buffering. The data transfer from the front-end electronics located on the detector platform is performed by serial links running at 160 Mbit/s. The design and test results of the subsystem readout electronics and system interface are discussed.
ISSN:0018-9499
1558-1578
DOI:10.1109/23.603672