Modeling of jitter and its effects on time interleaved ADC conversion

Post analog-to-digital conversion correction is an active area of research in both academia and industry due to the high potential of positive impact in areas like Synthetic Instrumentation (SI), Software Defined Radio (SDR), RADAR, etc. This paper introduces a high fidelity Simulink™ based behavior...

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Main Authors: Parkey, C. R., Mikhael, W. B., Chester, D. B., Hunter, M. T.
Format: Conference Proceeding
Language:English
Subjects:
ADC
Apertures
Bandwidth
error modelling
Generators
Harmonic analysis
Jitter
mismatches
Phase modulation
Quantization
Simulink
TI-ADC
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Mikhael, W. B.
Chester, D. B.
Hunter, M. T.
description Post analog-to-digital conversion correction is an active area of research in both academia and industry due to the high potential of positive impact in areas like Synthetic Instrumentation (SI), Software Defined Radio (SDR), RADAR, etc. This paper introduces a high fidelity Simulink™ based behavioral error model for time-interleaved analog-to-digital converters (TI-ADCs) to facilitate development of efficient post conversion correction algorithms for TI-ADCs. Theoretically TI-ADCs offer a technologically feasible and cost effective solution to the digitization of wide bandwidth analog signals. The contribution of the error model described in this paper solves a key obstacle in economical research and development in this area. In addition to the error sources associated with integrated high performance analog to digital converters ADCs, mismatched error sources affect the performance of time interleaved configurations.
doi_str_mv 10.1109/AUTEST.2011.6058747
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects ADC
Apertures
Bandwidth
error modelling
Generators
Harmonic analysis
Jitter
mismatches
Phase modulation
Quantization
Simulink
TI-ADC
title Modeling of jitter and its effects on time interleaved ADC conversion
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