A 1.65W fully integrated 90nm Bulk CMOS Intrinsic Charge Recycling capacitive DC-DC converter: Design & techniques for high power density

A fully integrated high power density capacitive 2:1 step-down DC-DC converter is designed in a standard Bulk CMOS technology. The implemented converter can deliver a maximum output power of 1.65W on a chip area of 2.14mm 2 , resulting in a power conversion density of 0.77W/mm 2 . Besides the primar...

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Bibliographic Details
Main Authors: Meyvaert, H., Van Breussegem, T., Steyaert, M.
Format: Conference Proceeding
Language:English
Subjects:
Capacitance
Capacitors
Charge transfer
CMOS integrated circuits
Impedance
Transistors
Voltage control
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Summary:A fully integrated high power density capacitive 2:1 step-down DC-DC converter is designed in a standard Bulk CMOS technology. The implemented converter can deliver a maximum output power of 1.65W on a chip area of 2.14mm 2 , resulting in a power conversion density of 0.77W/mm 2 . Besides the primary goal of high power density a peak power conversion efficiency of 69% is achieved. This for a voltage step-down conversion from twice the nominal supply voltage of a 90nm technology (2V dd = 2.4V) to 1V. Both the design as the implementation techniques to achieve the resulting power density, are discussed.
ISSN:2329-3721
2329-3748
DOI:10.1109/ECCE.2011.6064205