Loading…
Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic
This paper presents a high-performance and biophysically accurate neuroprocessor architecture based on floating point arithmetic and compartmental modeling. It aims to overcome the limitations of traditional hardware neuron models that simplify the required arithmetic using fixed-point models. This...
Saved in:
Published in: | IEEE transactions on computers 2013-03, Vol.62 (3), p.599-608 |
---|---|
Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | cdi_FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03 |
---|---|
cites | cdi_FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03 |
container_end_page | 608 |
container_issue | 3 |
container_start_page | 599 |
container_title | IEEE transactions on computers |
container_volume | 62 |
creator | Yiwei Zhang Mcgeehan, J. P. Regan, E. M. Kelly, S. Nunez-Yanez, J. L. |
description | This paper presents a high-performance and biophysically accurate neuroprocessor architecture based on floating point arithmetic and compartmental modeling. It aims to overcome the limitations of traditional hardware neuron models that simplify the required arithmetic using fixed-point models. This can result in arbitrary loss of precision due to rounding errors and data truncation. On the other hand, a neuroprocessor based on a floating-point bio-inspired model, such as the one presented in this work, is able to capture additional cell properties and accurately mimic cellular behaviors required in many neuroscience experiments. The architecture is prototyped in reconfigurable logic obtaining a flexible and adaptable cell and network structure together with real time performance by using the available floating point hardware resources in parallel. The paper also demonstrates model scalability by combining the basic processor components that describe the soma, dendrite and synapse of organic cells to form more complex neuron structures. |
doi_str_mv | 10.1109/TC.2011.257 |
format | article |
fullrecord | <record><control><sourceid>proquest_ieee_</sourceid><recordid>TN_cdi_ieee_primary_6122016</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6122016</ieee_id><sourcerecordid>2882752691</sourcerecordid><originalsourceid>FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03</originalsourceid><addsrcrecordid>eNpd0M9LwzAYxvEgCs7pyaOXghdBOt-ka9IcZ3EqzB_IPIc0eTszumYm7WH_vR0TD57ey4eXhy8hlxQmlIK8W5YTBpROWC6OyIjmuUilzPkxGQHQIpXZFE7JWYxrAOAM5Ii83Du__dpFZ3TT7JKZMX3QHSZzrzvXrpJ379ouecU--G3wBmP0ISa1D8kHGt_WbjX4qsFk4VfOnJOTWjcRL37vmHzOH5blU7p4e3wuZ4vUMM5FWkw1GLAVgpV2KrjGyhaCWmZYbaEGi7SoLOfaGklhKhjXGgGNMMhkXUE2JjeHv8Om7x5jpzYuGmwa3aLvo6IZzQXITGYDvf5H174P7bBOUVZkUhSU5YO6PSgTfIwBa7UNbqPDTlFQ-7RqWap9WjWkHfTVQTtE_JOcskHw7AeFo3T4</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1283978125</pqid></control><display><type>article</type><title>Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic</title><source>IEEE Xplore (Online service)</source><creator>Yiwei Zhang ; Mcgeehan, J. P. ; Regan, E. M. ; Kelly, S. ; Nunez-Yanez, J. L.</creator><creatorcontrib>Yiwei Zhang ; Mcgeehan, J. P. ; Regan, E. M. ; Kelly, S. ; Nunez-Yanez, J. L.</creatorcontrib><description>This paper presents a high-performance and biophysically accurate neuroprocessor architecture based on floating point arithmetic and compartmental modeling. It aims to overcome the limitations of traditional hardware neuron models that simplify the required arithmetic using fixed-point models. This can result in arbitrary loss of precision due to rounding errors and data truncation. On the other hand, a neuroprocessor based on a floating-point bio-inspired model, such as the one presented in this work, is able to capture additional cell properties and accurately mimic cellular behaviors required in many neuroscience experiments. The architecture is prototyped in reconfigurable logic obtaining a flexible and adaptable cell and network structure together with real time performance by using the available floating point hardware resources in parallel. The paper also demonstrates model scalability by combining the basic processor components that describe the soma, dendrite and synapse of organic cells to form more complex neuron structures.</description><identifier>ISSN: 0018-9340</identifier><identifier>EISSN: 1557-9956</identifier><identifier>DOI: 10.1109/TC.2011.257</identifier><identifier>CODEN: ITCOB4</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Architecture ; Computer Systems Organization ; Decision support systems ; Dendritic structure ; Floating point arithmetic ; Hardware ; Logic ; Mathematical models ; Microprocessors ; Neurocomputers ; Neurons ; Other Architecture Styles ; Processor Architecture ; Reconfigurable hardware ; Special-Purpose and Application-Based Systems ; Studies</subject><ispartof>IEEE transactions on computers, 2013-03, Vol.62 (3), p.599-608</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Mar 2013</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03</citedby><cites>FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6122016$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,27924,27925,54796</link.rule.ids></links><search><creatorcontrib>Yiwei Zhang</creatorcontrib><creatorcontrib>Mcgeehan, J. P.</creatorcontrib><creatorcontrib>Regan, E. M.</creatorcontrib><creatorcontrib>Kelly, S.</creatorcontrib><creatorcontrib>Nunez-Yanez, J. L.</creatorcontrib><title>Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic</title><title>IEEE transactions on computers</title><addtitle>TC</addtitle><description>This paper presents a high-performance and biophysically accurate neuroprocessor architecture based on floating point arithmetic and compartmental modeling. It aims to overcome the limitations of traditional hardware neuron models that simplify the required arithmetic using fixed-point models. This can result in arbitrary loss of precision due to rounding errors and data truncation. On the other hand, a neuroprocessor based on a floating-point bio-inspired model, such as the one presented in this work, is able to capture additional cell properties and accurately mimic cellular behaviors required in many neuroscience experiments. The architecture is prototyped in reconfigurable logic obtaining a flexible and adaptable cell and network structure together with real time performance by using the available floating point hardware resources in parallel. The paper also demonstrates model scalability by combining the basic processor components that describe the soma, dendrite and synapse of organic cells to form more complex neuron structures.</description><subject>Architecture</subject><subject>Computer Systems Organization</subject><subject>Decision support systems</subject><subject>Dendritic structure</subject><subject>Floating point arithmetic</subject><subject>Hardware</subject><subject>Logic</subject><subject>Mathematical models</subject><subject>Microprocessors</subject><subject>Neurocomputers</subject><subject>Neurons</subject><subject>Other Architecture Styles</subject><subject>Processor Architecture</subject><subject>Reconfigurable hardware</subject><subject>Special-Purpose and Application-Based Systems</subject><subject>Studies</subject><issn>0018-9340</issn><issn>1557-9956</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><recordid>eNpd0M9LwzAYxvEgCs7pyaOXghdBOt-ka9IcZ3EqzB_IPIc0eTszumYm7WH_vR0TD57ey4eXhy8hlxQmlIK8W5YTBpROWC6OyIjmuUilzPkxGQHQIpXZFE7JWYxrAOAM5Ii83Du__dpFZ3TT7JKZMX3QHSZzrzvXrpJ379ouecU--G3wBmP0ISa1D8kHGt_WbjX4qsFk4VfOnJOTWjcRL37vmHzOH5blU7p4e3wuZ4vUMM5FWkw1GLAVgpV2KrjGyhaCWmZYbaEGi7SoLOfaGklhKhjXGgGNMMhkXUE2JjeHv8Om7x5jpzYuGmwa3aLvo6IZzQXITGYDvf5H174P7bBOUVZkUhSU5YO6PSgTfIwBa7UNbqPDTlFQ-7RqWap9WjWkHfTVQTtE_JOcskHw7AeFo3T4</recordid><startdate>20130301</startdate><enddate>20130301</enddate><creator>Yiwei Zhang</creator><creator>Mcgeehan, J. P.</creator><creator>Regan, E. M.</creator><creator>Kelly, S.</creator><creator>Nunez-Yanez, J. L.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20130301</creationdate><title>Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic</title><author>Yiwei Zhang ; Mcgeehan, J. P. ; Regan, E. M. ; Kelly, S. ; Nunez-Yanez, J. L.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Architecture</topic><topic>Computer Systems Organization</topic><topic>Decision support systems</topic><topic>Dendritic structure</topic><topic>Floating point arithmetic</topic><topic>Hardware</topic><topic>Logic</topic><topic>Mathematical models</topic><topic>Microprocessors</topic><topic>Neurocomputers</topic><topic>Neurons</topic><topic>Other Architecture Styles</topic><topic>Processor Architecture</topic><topic>Reconfigurable hardware</topic><topic>Special-Purpose and Application-Based Systems</topic><topic>Studies</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Yiwei Zhang</creatorcontrib><creatorcontrib>Mcgeehan, J. P.</creatorcontrib><creatorcontrib>Regan, E. M.</creatorcontrib><creatorcontrib>Kelly, S.</creatorcontrib><creatorcontrib>Nunez-Yanez, J. L.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005–Present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE Xplore</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on computers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Yiwei Zhang</au><au>Mcgeehan, J. P.</au><au>Regan, E. M.</au><au>Kelly, S.</au><au>Nunez-Yanez, J. L.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic</atitle><jtitle>IEEE transactions on computers</jtitle><stitle>TC</stitle><date>2013-03-01</date><risdate>2013</risdate><volume>62</volume><issue>3</issue><spage>599</spage><epage>608</epage><pages>599-608</pages><issn>0018-9340</issn><eissn>1557-9956</eissn><coden>ITCOB4</coden><abstract>This paper presents a high-performance and biophysically accurate neuroprocessor architecture based on floating point arithmetic and compartmental modeling. It aims to overcome the limitations of traditional hardware neuron models that simplify the required arithmetic using fixed-point models. This can result in arbitrary loss of precision due to rounding errors and data truncation. On the other hand, a neuroprocessor based on a floating-point bio-inspired model, such as the one presented in this work, is able to capture additional cell properties and accurately mimic cellular behaviors required in many neuroscience experiments. The architecture is prototyped in reconfigurable logic obtaining a flexible and adaptable cell and network structure together with real time performance by using the available floating point hardware resources in parallel. The paper also demonstrates model scalability by combining the basic processor components that describe the soma, dendrite and synapse of organic cells to form more complex neuron structures.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TC.2011.257</doi><tpages>10</tpages><oa>free_for_read</oa></addata></record> |
fulltext | fulltext |
identifier | ISSN: 0018-9340 |
ispartof | IEEE transactions on computers, 2013-03, Vol.62 (3), p.599-608 |
issn | 0018-9340 1557-9956 |
language | eng |
recordid | cdi_ieee_primary_6122016 |
source | IEEE Xplore (Online service) |
subjects | Architecture Computer Systems Organization Decision support systems Dendritic structure Floating point arithmetic Hardware Logic Mathematical models Microprocessors Neurocomputers Neurons Other Architecture Styles Processor Architecture Reconfigurable hardware Special-Purpose and Application-Based Systems Studies |
title | Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T02%3A27%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_ieee_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Biophysically%20Accurate%20Foating%20Point%20Neuroprocessors%20for%20Reconfigurable%20Logic&rft.jtitle=IEEE%20transactions%20on%20computers&rft.au=Yiwei%20Zhang&rft.date=2013-03-01&rft.volume=62&rft.issue=3&rft.spage=599&rft.epage=608&rft.pages=599-608&rft.issn=0018-9340&rft.eissn=1557-9956&rft.coden=ITCOB4&rft_id=info:doi/10.1109/TC.2011.257&rft_dat=%3Cproquest_ieee_%3E2882752691%3C/proquest_ieee_%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c2667-84a0c0dbe0d9d476aebd871d2c2fd0f0de18bd66adc9104726aae0ec7ce29fb03%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=1283978125&rft_id=info:pmid/&rft_ieee_id=6122016&rfr_iscdi=true |