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Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors
We present an 8.0-Gb/s HyperTransport™ technology I/O built in a 32-nm SOI-CMOS processor for high-performance servers. Based on a 45-nm design that caps at 6.4 Gb/s, the 32-nm transceiver achieves up to 8.0 Gb/s over long-reach board channels. Key enhancements include a high-bandwidth (>;200 MHz...
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| creator | Doyle, B. A. Loke, A. L. S. Maheshwari, S. K. Wang, C. L. Fischette, D. M. Cooper, J. G. Aggarwal, S. K. Wee, T. T. Lackey, C. O. Kedarnath, H. S. Oshima, M. M. Talbot, G. R. Fang, E. S. |
| description | We present an 8.0-Gb/s HyperTransport™ technology I/O built in a 32-nm SOI-CMOS processor for high-performance servers. Based on a 45-nm design that caps at 6.4 Gb/s, the 32-nm transceiver achieves up to 8.0 Gb/s over long-reach board channels. Key enhancements include a high-bandwidth (>;200 MHz) PLL to attenuate high-frequency jitter in the received forwarded clock and redesigned power-hungry circuits to operate at 8.0 Gb/s within the existing 45-nm package thermal limit. |
| doi_str_mv | 10.1109/ASSCC.2011.6123620 |
| format | conference_proceeding |
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S.</creatorcontrib><creatorcontrib>Oshima, M. M.</creatorcontrib><creatorcontrib>Talbot, G. R.</creatorcontrib><creatorcontrib>Fang, E. S.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Doyle, B. A.</au><au>Loke, A. L. S.</au><au>Maheshwari, S. K.</au><au>Wang, C. L.</au><au>Fischette, D. M.</au><au>Cooper, J. G.</au><au>Aggarwal, S. K.</au><au>Wee, T. T.</au><au>Lackey, C. O.</au><au>Kedarnath, H. S.</au><au>Oshima, M. M.</au><au>Talbot, G. R.</au><au>Fang, E. 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| identifier | ISBN: 9781457717840 |
| ispartof | IEEE Asian Solid-State Circuits Conference 2011, 2011, p.133-136 |
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| language | eng |
| recordid | cdi_ieee_primary_6123620 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Bandwidth Bit error rate Clocks Frequency modulation Jitter Phase locked loops Program processors |
| title | Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors |
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