SET characterization & mitigation in 65-nm test structures

SET propagation and mitigation in 65-nm test structures are investigated. Radiation tests show a clear distortion of the SET pulse-widths related to the structures' design and layout and the efficacy of the employed mitigation techniques.

Saved in:
Bibliographic Details
Main Authors: Rezgui, S., Won, Raymond, Tien, J., George, J.
Format: Conference Proceeding
Language:English
Subjects:
Delay
Fault Injection
Field programmable gate arrays
Inverters
Latches
Logic gates
Propagation and Mitigation
radiation tests
reprogrammable and non-volatile Flash-based FPGAs
Routing
SET Characterization
Table lookup
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:SET propagation and mitigation in 65-nm test structures are investigated. Radiation tests show a clear distortion of the SET pulse-widths related to the structures' design and layout and the efficacy of the employed mitigation techniques.
ISSN:0379-6566
DOI:10.1109/RADECS.2011.6131306