Pacman: Tolerating asymmetric data races with unintrusive hardware

Data races are a major contributor to parallel software unreliability. A type of race that is both common and typically harmful is the Asymmetric data race. It occurs when at least one of the racing threads is inside a critical section. Current proposals that target them are software-based. They slo...

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Bibliographic Details
Main Authors: Shanxiang Qi, Otsuki, N., Nogueira, L. O., Muzahid, A., Torrellas, J.
Format: Conference Proceeding
Language:English
Subjects:
Coherence
Hardware
Instruction sets
Message systems
Protocols
Synchronization
System recovery
Online Access:Request full text
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Summary:Data races are a major contributor to parallel software unreliability. A type of race that is both common and typically harmful is the Asymmetric data race. It occurs when at least one of the racing threads is inside a critical section. Current proposals that target them are software-based. They slow down execution and require significant compiler, operating system (OS), or application changes. This paper proposes the first scheme to tolerate asymmetric data races in production runs with negligible execution overhead. The scheme, called Pacman, exploits cache coherence hardware to temporarily protect the variables that a thread accesses in a critical section from other threads' requests. Unlike previous schemes, Pacman induces negligible slowdown, needs no support from the compiler or (in the baseline design) from the OS, and requires no application source code changes. In addition, its hardware is relatively unintrusive. We test Pacman with the SPLASH-2, PARSEC, Sphinx 3, and Apache codes, and discover two unreported asymmetric data races.
ISSN:1530-0897
2378-203X
DOI:10.1109/HPCA.2012.6169039