Long-term annealing effects on the Co/sup 60/-/spl gamma/ ray damaged MOS capacitor at icing temperature

• Main Authors: Ryu, B.H., Kwon, S.S., Lim, K.J., Park, S.G., Kim, B.H., Kim, H.H.
• Format: Conference Proceeding
• Language: English
• Subjects: Annealing; Capacitance-voltage characteristics; Channel bank filters; Educational institutions; Interface states; MOS capacitors; Temperature dependence; Temperature measurement; Threshold voltage; Tunneling
• DOI: 10.1109/ICPADM.1997.617595

In this study, presents some discussions such as the dependence of oxide thickness, absorbed doses against to the long-term annealing effects at icing temperature with zero volt biased on the Co/sup 60/-Y ray induced damage in MOS capacitors. The 1 MHz C-V and D-V curves of the annealed samples were significantly shifted back to the positive direction and more stretched-out or distorted with the irradiated doses and oxide thickness to be increased, V/sub FB/, V/sub TH/ and V/sub DP/ were also shifted to positive. These tendencies explained that the oxide- and interface-trapped charges tends to be annealed or recombined with time at a nearly constant annealing rate with respect to annealing conditions and significantly affected by the variations of oxide thickness and absorbed doses. The inversion capacitance and D/sub P/ on the annealed samples were increased with increasing the oxide thickness and irradiated doses. It seems that the effects of the remained interface states and LNUs can be reduced as the oxide is thinned, and they would be strongly interacted with majority carriers on the Si/SiO/sub 2/ interface.