Low cost test for catastrophic faults in CMOS operational transcondutor

In this paper, a test is developed for the Operational Transconductor (OTA). The technology used is the 90nm CMOS technology. The assumed fault model consists of six faults per transistor including the open-gate fault. It is proven that only two test values are enough to detect 34 of the possible 36...

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Bibliographic Details
Main Authors: Fouad, M. M., Madian, A. H., Amer, Hassanein H., AbdelHalim, M. B.
Format: Conference Proceeding
Language:English
Subjects:
Analog Testing
Circuit faults
CMOS
CMOS integrated circuits
fault model
Integrated circuit modeling
Logic gates
minimum test
Resistance
Testing
Transcondcutor
Transistors
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Summary:In this paper, a test is developed for the Operational Transconductor (OTA). The technology used is the 90nm CMOS technology. The assumed fault model consists of six faults per transistor including the open-gate fault. It is proven that only two test values are enough to detect 34 of the possible 36 faults, i.e., a coverage of 94.4%. A Monte Carlo analysis is then performed to study the effect, on test coverage, of changing the value of the resistive short in the fault model. It is found that the same two test values still guarantee 94.4% coverage irrespective of the value of the short.
ISSN:2159-1660
DOI:10.1109/ICM.2011.6177397