Matching-assisted self-assembly for thin chips

The paper describes a process of mass assembly of thin chips with large number of I/Os onto silicon substrate using mechanical shape locking mechanism. A certain pattern was fabricated on the backside of 3mm × 3mm × 50μm ultrathin chips by conventional micro fabrication technique. A complementary pa...

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Bibliographic Details
Main Authors: HongYao Chua, Ho, D., Li Yan Siow, Kripesh, V.
Format: Conference Proceeding
Language:English
Subjects:
Assembly
Bonding
Metals
Self-assembly
Shape
Substrates
Online Access:Request full text
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Summary:The paper describes a process of mass assembly of thin chips with large number of I/Os onto silicon substrate using mechanical shape locking mechanism. A certain pattern was fabricated on the backside of 3mm × 3mm × 50μm ultrathin chips by conventional micro fabrication technique. A complementary pattern was also fabricated on 8" carrier wafer which contains 324 receptor sites. Under the optimal agitation condition, the thin chips were self-assembled into the receptor sites of carrier wafer with an average assembly yield of 95.4% within 8 minutes. The assembled thin chips on carrier wafer were then aligned and gang bonded with substrate wafer with solder interconnection. The yield for gang bonding is about 95.7%. Using this method, the assembly of ultrathin chips with unique face orientation and in-plane orientation can be achieved simultaneously. This parallel assembly technique helps to resolve the issue faced by conventional "pick-and-place" technique, difficulty in releasing the micro-devices/ultrathin devices from the robotic manipulators.
DOI:10.1109/EPTC.2011.6184533