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Optimal microarchitectural design configuration selection for processor hard-error reliability
Traditional design space exploration mainly focuses on performance and power consumption. However, as one of the first-class constraints for modern processor design, the relationship between hard-error reliability and processor configurations has not been well studied. In this paper, we investigate...
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Main Authors: | , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | Traditional design space exploration mainly focuses on performance and power consumption. However, as one of the first-class constraints for modern processor design, the relationship between hard-error reliability and processor configurations has not been well studied. In this paper, we investigate this relationship by exploring a large processor design space. We employ a rule search strategy, i.e. Patient Rule Induction Method, to generate a set of rules which choose optimal configurations for processor hard-error reliability and its tradeoff with performance and power consumption. |
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ISSN: | 1948-3287 1948-3295 |
DOI: | 10.1109/ISQED.2012.6187479 |