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Latch-Controlled Current Cell for Low Power Current-Steering D/A Converter
This paper introduces the design and implementation of a novel current cell in current-steering digital-to-analog converter (DAC). The current cell consists of current switch and source which are independently controlled by latch. A sequential switch-on process similar to thermometer decoding is imp...
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creator | Chan-Soo Lee Jung-Woong Park Hyung-Gyoo Lee Nam-Soo Kim Hai-Feng Jin |
description | This paper introduces the design and implementation of a novel current cell in current-steering digital-to-analog converter (DAC). The current cell consists of current switch and source which are independently controlled by latch. A sequential switch-on process similar to thermometer decoding is implemented in source to reduce the power consumption. A 12-b DAC has been fabricated using a single-poly four-metal 0.35 μm CMOS process. Comparison with conventional DAC shows that the proposed DAC produces a power reduction in the order of 35% without degradation of linearity. |
doi_str_mv | 10.1109/UKSim.2012.100 |
format | conference_proceeding |
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The current cell consists of current switch and source which are independently controlled by latch. A sequential switch-on process similar to thermometer decoding is implemented in source to reduce the power consumption. A 12-b DAC has been fabricated using a single-poly four-metal 0.35 μm CMOS process. Comparison with conventional DAC shows that the proposed DAC produces a power reduction in the order of 35% without degradation of linearity.</description><identifier>ISBN: 1467313661</identifier><identifier>ISBN: 9781467313667</identifier><identifier>EISBN: 9780769546827</identifier><identifier>EISBN: 076954682X</identifier><identifier>DOI: 10.1109/UKSim.2012.100</identifier><identifier>LCCN: 2012934377</identifier><language>eng</language><publisher>IEEE</publisher><subject>Arrays ; Current cell ; DAC ; Decoding ; latch ; Latches ; Microprocessors ; power consumption ; Power demand ; Switches</subject><ispartof>2012 UKSim 14th International Conference on Computer Modelling and Simulation, 2012, p.655-659</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6205524$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6205524$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chan-Soo Lee</creatorcontrib><creatorcontrib>Jung-Woong Park</creatorcontrib><creatorcontrib>Hyung-Gyoo Lee</creatorcontrib><creatorcontrib>Nam-Soo Kim</creatorcontrib><creatorcontrib>Hai-Feng Jin</creatorcontrib><title>Latch-Controlled Current Cell for Low Power Current-Steering D/A Converter</title><title>2012 UKSim 14th International Conference on Computer Modelling and Simulation</title><addtitle>uksim</addtitle><description>This paper introduces the design and implementation of a novel current cell in current-steering digital-to-analog converter (DAC). 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Comparison with conventional DAC shows that the proposed DAC produces a power reduction in the order of 35% without degradation of linearity.</description><subject>Arrays</subject><subject>Current cell</subject><subject>DAC</subject><subject>Decoding</subject><subject>latch</subject><subject>Latches</subject><subject>Microprocessors</subject><subject>power consumption</subject><subject>Power demand</subject><subject>Switches</subject><isbn>1467313661</isbn><isbn>9781467313667</isbn><isbn>9780769546827</isbn><isbn>076954682X</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1jMtOwzAURI1QJWjJlg0b_0DSe_2Ml1V4EwmklnXluNcQlCbIDVT8PUXAbGZx5gxj5wgFIrj588Oy3RYCUBQIcMQyZ0uwxmllSmGP2RSVsRKlMThh05-dk0pae8Ky3e4NDrEgSqlP2X3tx_CaV0M_pqHraMOrj5SoH3lFXcfjkHg97PnTsKf0j_LlSJTa_oVfzhf8oH5SGimdsUn03Y6yv56x1fXVqrrN68ebu2pR562DMUcdfNDRGAoUGiTpFDoNUUVpvTIK0cegEHzZaBvB2MYJpTbgRSiVaYScsYvf25aI1u-p3fr0tTYCtBZKfgOUCE64</recordid><startdate>201203</startdate><enddate>201203</enddate><creator>Chan-Soo Lee</creator><creator>Jung-Woong Park</creator><creator>Hyung-Gyoo Lee</creator><creator>Nam-Soo Kim</creator><creator>Hai-Feng Jin</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201203</creationdate><title>Latch-Controlled Current Cell for Low Power Current-Steering D/A Converter</title><author>Chan-Soo Lee ; Jung-Woong Park ; Hyung-Gyoo Lee ; Nam-Soo Kim ; Hai-Feng Jin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-15cac5f66ececb1e3941950f4f37a46411afc410a8b57f067b9244d0a2c846b23</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Arrays</topic><topic>Current cell</topic><topic>DAC</topic><topic>Decoding</topic><topic>latch</topic><topic>Latches</topic><topic>Microprocessors</topic><topic>power consumption</topic><topic>Power demand</topic><topic>Switches</topic><toplevel>online_resources</toplevel><creatorcontrib>Chan-Soo Lee</creatorcontrib><creatorcontrib>Jung-Woong Park</creatorcontrib><creatorcontrib>Hyung-Gyoo Lee</creatorcontrib><creatorcontrib>Nam-Soo Kim</creatorcontrib><creatorcontrib>Hai-Feng Jin</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore (Online service)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chan-Soo Lee</au><au>Jung-Woong Park</au><au>Hyung-Gyoo Lee</au><au>Nam-Soo Kim</au><au>Hai-Feng Jin</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Latch-Controlled Current Cell for Low Power Current-Steering D/A Converter</atitle><btitle>2012 UKSim 14th International Conference on Computer Modelling and Simulation</btitle><stitle>uksim</stitle><date>2012-03</date><risdate>2012</risdate><spage>655</spage><epage>659</epage><pages>655-659</pages><isbn>1467313661</isbn><isbn>9781467313667</isbn><eisbn>9780769546827</eisbn><eisbn>076954682X</eisbn><abstract>This paper introduces the design and implementation of a novel current cell in current-steering digital-to-analog converter (DAC). The current cell consists of current switch and source which are independently controlled by latch. A sequential switch-on process similar to thermometer decoding is implemented in source to reduce the power consumption. A 12-b DAC has been fabricated using a single-poly four-metal 0.35 μm CMOS process. Comparison with conventional DAC shows that the proposed DAC produces a power reduction in the order of 35% without degradation of linearity.</abstract><pub>IEEE</pub><doi>10.1109/UKSim.2012.100</doi><tpages>5</tpages></addata></record> |
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ispartof | 2012 UKSim 14th International Conference on Computer Modelling and Simulation, 2012, p.655-659 |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Arrays Current cell DAC Decoding latch Latches Microprocessors power consumption Power demand Switches |
title | Latch-Controlled Current Cell for Low Power Current-Steering D/A Converter |
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