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A SAR A/D converter using PWM technique

This paper presents the modeling calculations of a new SAR A/D converter architecture that uses a PWM generator and a first order low pass filter to build a simple circuit. In order to validate calculations, a 4 - bit successive approximation A/D converter has been simulated using Simulink and Model...

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Bibliographic Details
Main Authors: Della Colletta, Gustavo, Ferreira, L. H. C., Pimenta, T. C., Crepaldi, P. C.
Format: Conference Proceeding
Language:English
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Summary:This paper presents the modeling calculations of a new SAR A/D converter architecture that uses a PWM generator and a first order low pass filter to build a simple circuit. In order to validate calculations, a 4 - bit successive approximation A/D converter has been simulated using Simulink and Modelsim. Then the circuit layout was developed in 0.5μm CMOS process with CADENCE Virtuoso. Post layout simulations were performed using BSIM3v3 model in Spectre simulator. The power consumption is only 16μW for a 2.5V power supply. DNL and INL erros are less then 0.1LSB.
DOI:10.1109/MIEL.2012.6222888