Building a test environment component in VHDL for an infrared link access protocol (IrLAP) compliant ASIC interface

This paper presents the experiences of the Texas Instruments Bus Solutions ASIC design team in its efforts to create and use a component written in VHDL which was embedded into the test environment for an ASIC. The VHDL component described had to be: dynamically controllable; able to accept and chec...

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Main Author: McKinney, M.D.
Format: Conference Proceeding
Language:English
Subjects:
Access protocols
Application specific integrated circuits
Clocks
Cyclic redundancy check
Finite impulse response filter
Instruments
Optical fiber communication
Physical layer
Testing
Transmitters
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description This paper presents the experiences of the Texas Instruments Bus Solutions ASIC design team in its efforts to create and use a component written in VHDL which was embedded into the test environment for an ASIC. The VHDL component described had to be: dynamically controllable; able to accept and check a wide range of expected results from the ASIC design; able to stimulate the design in every action which was compliant with the IrLAP specification; and able to inject several different kinds of errors into the stimulus flow under user control. Embedding this level of stimulus strength, self-checking and user control was a challenge, but completing the component allowed the ASIC design team to field a fully verified interface which has needed no changes since its release to silicon.
doi_str_mv 10.1109/VIUF.1997.623953
format conference_proceeding
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ispartof Proceedings VHDL International Users' Forum. Fall Conference, 1997, p.217-224
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Access protocols
Application specific integrated circuits
Clocks
Cyclic redundancy check
Finite impulse response filter
Instruments
Optical fiber communication
Physical layer
Testing
Transmitters
title Building a test environment component in VHDL for an infrared link access protocol (IrLAP) compliant ASIC interface
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