Logic circuits with high-impedance output state for interconnection of ternary and binary CMOS digital circuits and systems

Possibilities and principles for interconnection of CMOS ternary circuits and systems with binary common buses in digital circuits and systems are considered and described in the paper. Proposed are circuits with high-impedance output state for interconnection that perform signal conversion from ter...

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Bibliographic Details
Main Authors: Bundalo, D., Bundalo, Z., Softic, F., Kostadinovic, M., Pasalic, D.
Format: Conference Proceeding
Language:English
Subjects:
Binary circuits
CMOS logic circuits
CMOS logic circuits and systems
High-impedance output state
Impedance
Integrated circuit interconnections
Integrated circuit modeling
Interconnection circuits
Logic circuits
Ternary circuits
Threshold voltage
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Description
Summary:Possibilities and principles for interconnection of CMOS ternary circuits and systems with binary common buses in digital circuits and systems are considered and described in the paper. Proposed are circuits with high-impedance output state for interconnection that perform signal conversion from ternary to binary CMOS digital system. General structure and general principle for design of such circuits are shown and described first. Then, the concrete circuit solutions are proposed and described. The circuits with one ternary input and the circuits with any number of ternary inputs are given and described. All proposed circuits were analyzed by computer simulations. All considerations, descriptions and conclusions were confirmed by simulation.