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Optimizing energy efficiency of 3-D multicore systems with stacked DRAM under power and thermal constraints
3D multicore systems with stacked DRAM have the potential to boost system performance significantly; however, this performance increase may cause 3D systems to exceed the power budget or create thermal hot spots. This paper introduces a framework to model on-chip DRAM accesses and analyzes performan...
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Main Authors: | , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | 3D multicore systems with stacked DRAM have the potential to boost system performance significantly; however, this performance increase may cause 3D systems to exceed the power budget or create thermal hot spots. This paper introduces a framework to model on-chip DRAM accesses and analyzes performance, power, and temperature tradeoffs of 3D systems. We propose a runtime optimization policy to maximize performance while maintaining power and thermal constraints. Our policy dynamically monitors workload behavior and selects among low-power and turbo operating modes accordingly. Experiments with multithreaded workloads demonstrate up to 49% energy efficiency improvements compared to existing thermal management policies. |
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ISSN: | 0738-100X |
DOI: | 10.1145/2228360.2228477 |