A harmonic-rejection mixer with improved design algorithm for broadband TV tuners

A wide-band harmonic rejection mixer for TV tuners with an improved design algorithm is fabricated in 65-nm CMOS process. A more realistic mathematical formula is derived to calculate harmonic rejection performance. The third and fifth order harmonic rejection ratio calculation, based on the new pro...

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Bibliographic Details
Main Authors: Huajiang Zhang, Tian Bao Gao, Tan, S. C. G., Shana'a, O.
Format: Conference Proceeding
Language:English
Subjects:
amplitude mismatch
Equations
Harmonic analysis
Harmonic rejection mixer
Mathematical model
Mixers
phase imbalance
Power harmonic filters
Tuners
TV tuner
Online Access:Request full text
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Summary:A wide-band harmonic rejection mixer for TV tuners with an improved design algorithm is fabricated in 65-nm CMOS process. A more realistic mathematical formula is derived to calculate harmonic rejection performance. The third and fifth order harmonic rejection ratio calculation, based on the new proposed equations, precisely predicts simulation results. A systematic design optimization technique pushes the mean of the harmonic rejection performance to a higher value resulting in better yield. The measured third and fifth order harmonic rejection ratio for 2000 samples is better than -56dBc for VHFI and II bands without increasing any circuit complexity or implementation difficulty.
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2012.6242255