Accurate chip leakage prediction: Challenges and solutions

A systematic method is proposed to address modeling challenges in accurate chip level leakage prediction, namely a precise total leakage width count method, a simple model to quantify leakage uplift caused by systematic across-chip variation, and a consistent model to capture 3-sigma leakage and lea...

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Bibliographic Details
Main Authors: Xiaojun Yu, Jie Deng, Sim Loo, Dezfulian, K., Lichtensteiger, S., Bickford, J., Habib, N., Chang, P., Mocuta, A., Rim, Ken
Format: Conference Proceeding
Language:English
Subjects:
across-chip variation
Correlation
Delay
IDDQ
Integrated circuit modeling
leakage spread
Performance evaluation
Predictive models
Stacking
Stacking factor
Systematics
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Description
Summary:A systematic method is proposed to address modeling challenges in accurate chip level leakage prediction, namely a precise total leakage width count method, a simple model to quantify leakage uplift caused by systematic across-chip variation, and a consistent model to capture 3-sigma leakage and leakage spread at fixed performance.
ISSN:0743-1562
DOI:10.1109/VLSIT.2012.6242526