A 0.8V 6.4µW compact mixed-signal front-end for neural implants

In this paper, a compact, reconfigurable, low-power mixed-signal neural front-end is presented. It employs a multi-bit ΣΔ DAC and a flexible digital filter in the feedback to suppress electrode DC offset up to ±50 mV. A low noise neural amplifier is used to amplify both spikes and local field potent...

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Bibliographic Details
Main Authors: El-Kholy, A., Ghoneima, M., Sharaf, K.
Format: Conference Proceeding
Language:English
Subjects:
antialiasing
Band pass filters
brain machine interface
Frequency modulation
instrumentation amplifiers
Lead
neural interface
Neural recording
Switches
Time domain analysis
Online Access:Request full text
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Summary:In this paper, a compact, reconfigurable, low-power mixed-signal neural front-end is presented. It employs a multi-bit ΣΔ DAC and a flexible digital filter in the feedback to suppress electrode DC offset up to ±50 mV. A low noise neural amplifier is used to amplify both spikes and local field potentials (LFPs). A second order gm-C anti-aliasing filter is used to filter out ΣΔ DAC quantization noise. A 8b 200 kS/s SAR ADC is proposed with 48.7 SNDR and 22.5 fJ/conv. step. The whole neural front-end achieves a low input-referred noise of 5.2 μV rms for a signal bandwidth of 10 kHz using a compact and highly programmable architecture. It consumes 6.4 μW from 0.8 V supply while occupying 0.049 mm 2 in 0.13 μm CMOS.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2012.6271733