Hybrid continuous-time/discrete-time circuit techniques for the efficient implementation of wideband ΣΔ ADCs

This paper discuses the use of hybrid continuous-time/discrete-time ΣΔ modulators for the implementation of high-efficiency wideband analog-to-digital converters. Two alternative implementations of multi-rate cascade architectures are studied and compared with conventional single-rate continuous-tim...

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Bibliographic Details
Main Authors: Garcia-Sanchez, J. G., de la Rosa, J. M.
Format: Conference Proceeding
Language:English
Subjects:
hybrid continuous-time/discrete-time circuits
Integrated circuit modeling
Modulation
Quantization
Sigma-delta modulators
Signal to noise ratio
Strontium
Transfer functions
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Summary:This paper discuses the use of hybrid continuous-time/discrete-time ΣΔ modulators for the implementation of high-efficiency wideband analog-to-digital converters. Two alternative implementations of multi-rate cascade architectures are studied and compared with conventional single-rate continuous-time topologies. The effect of three error mechanisms is considered, namely: mismatch, finite dc gain error and finite gain-bandwidth product. In all cases, closed-form expressions are derived for the nonideal in-band noise power of all ΣΔ modulators under study, giving an analytical relation between their system-level performance and the corresponding circuit-level error parameters. Time-domain behavioral simulations are in good agreement with theoretical predictions, demonstrating the validity of the presented approach.
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2012.6292035