An 8.5-11.5Gbps SONET transceiver with referenceless frequency acquisition

An 8.5-11.5Gbps SONET transceiver with a referenceless CDR employing an algorithmic frequency acquisition scheme (without using any training sequence) is designed in a 65nm digital CMOS process. A modified digital quadricorrelator frequency detector (M-DQFD) is incorporated into an LC-based VCO coar...

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Bibliographic Details
Main Authors: Kocaman, N., Fallahi, S., Kargar, M., Khanpour, M., Momtaz, A.
Format: Conference Proceeding
Language:English
Subjects:
Calibration
Clocks
Detectors
Jitter
SONET
Transceivers
Voltage-controlled oscillators
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Summary:An 8.5-11.5Gbps SONET transceiver with a referenceless CDR employing an algorithmic frequency acquisition scheme (without using any training sequence) is designed in a 65nm digital CMOS process. A modified digital quadricorrelator frequency detector (M-DQFD) is incorporated into an LC-based VCO coarse tuning adjustment. The transceiver complies with stringent SONET OC-192 jitter requirements. Within a 400μs acquisition time, the RX achieves a high-frequency jitter tolerance of 0.58UIpp at 10mVpp-diff input sensitivity. The TX serial output exhibits a random jitter (RJ) of 205fs (rms). The transceiver occupies 0.97mm 2 and consumes 141mA at 1.0V.
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2012.6330578