A programmable calibration/BIST engine for RF/analog blocks in SoCs

A programmable digital engine for RF/analog on/off-line calibration and Built-in Self-Test (BIST) enables a new level of robustness and portability for mixed signal SoCs. The drop-in IP-block is based on a dedicated CPU with data path and instruction set extensions optimized for the compute intensiv...

Full description

Saved in:
Bibliographic Details
Main Authors: Hermosillo, J., Carballido, J., Veloz, A., Arditti, D., Del Rio, A., Borrayo, E., Guzman, M. E., Lakdawala, H., Verhelst, M.
Format: Conference Proceeding
Language:English
Subjects:
Built-in self-test
Calibration
Engines
IEEE 802.11 Standards
Quadrature amplitude modulation
Radio frequency
System-on-a-chip
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A programmable digital engine for RF/analog on/off-line calibration and Built-in Self-Test (BIST) enables a new level of robustness and portability for mixed signal SoCs. The drop-in IP-block is based on a dedicated CPU with data path and instruction set extensions optimized for the compute intensive RF calibration algorithms. The concept is demonstrated with an implementation in a 32nm SoC test chip where the 0.63mm 2 engine has been fully integrated with a WiFi radio and has been used to measure and calibrate its inherent non-idealities and to evaluate its performance.
ISSN:1930-8833
2643-1319
DOI:10.1109/ESSCIRC.2012.6341307