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Key enabling processes for more-than-moore technologies
The continuation of Moore's law by conventional complementary metal oxide semiconductor (CMOS) scaling is becoming more and more challenging, requiring huge capital investments. 3D-IC with through-silicon via (TSV) interconnects provides another path towards "More Than Moore" with rel...
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Main Authors: | , , , , , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | The continuation of Moore's law by conventional complementary metal oxide semiconductor (CMOS) scaling is becoming more and more challenging, requiring huge capital investments. 3D-IC with through-silicon via (TSV) interconnects provides another path towards "More Than Moore" with relatively smaller capital investment. Recent announcements from leading image sensor and memory manufacturers show that 3D-ICs are finally moving into high-volume manufacturing (HVM) putting "More Than Moore" in reality. Wafer bonding is the enabling process technology to make this happen. Two of the key wafer bonding techniques - low temperature fusion bonding as well as temporary bonding and de-bonding are the major subject of this contribution, introducing basic process flows and working principles for their CMOS integration. |
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ISSN: | 1078-621X 2577-2295 |
DOI: | 10.1109/SOI.2012.6404360 |