The bi-mode branch predictor

Dynamic branch predictors are popular because they can deliver accurate branch prediction without changes to the instruction set architecture or pre existing binaries. However, to achieve the desired prediction accuracy, existing dynamic branch predictors require considerable amounts of hardware to...

Full description

Saved in:
Bibliographic Details
Main Authors: Chih-Chieh Lee, Chen, I.-C.K., Mudge, T.N.
Format: Conference Proceeding
Language:English
Subjects:
Accuracy
Economic forecasting
Hardware
History
Interference
Microprocessors
Pipelines
Runtime
Timing
Writing
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Dynamic branch predictors are popular because they can deliver accurate branch prediction without changes to the instruction set architecture or pre existing binaries. However, to achieve the desired prediction accuracy, existing dynamic branch predictors require considerable amounts of hardware to minimize the interference effects due to aliasing in the prediction tables. We propose a new dynamic predictor, the bi mode predictor, which divides the prediction tables into two halves and by dynamically determining the current "mode" of the program, selects the appropriate half of the table for prediction. This approach is shown to preserve the merits of global history based prediction while reducing destructive aliasing and, as a result, improving prediction accuracy. Moreover, it is simple enough that it does not impact a processor's cycle time. We conclude by conducting a comprehensive study into the mechanism underlying two level dynamic predictors and investigate the criteria for their optimal designs. The analysis presented provides a general framework for studying branch predictors.
ISSN:1072-4451
DOI:10.1109/MICRO.1997.645792