Improved reliability of rarely switching CMOS circuits in ULSI devices

In this work, novel configurations of rarely switching ULSI I/O circuits, which provide a "refresh" operation allowing for temporal bias removal without any changes in the logic state or electrical characteristics of these circuits, are presented. This bias removal significantly reduces th...

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Bibliographic Details
Main Authors: Sofer, S., Livshits, P., Priel, M.
Format: Conference Proceeding
Language:English
Subjects:
Integrated circuit reliability
MOSFETs
Stress
Switching circuits
Timing
Ultra large scale integration
Online Access:Request full text
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Description
Summary:In this work, novel configurations of rarely switching ULSI I/O circuits, which provide a "refresh" operation allowing for temporal bias removal without any changes in the logic state or electrical characteristics of these circuits, are presented. This bias removal significantly reduces the aging of the circuits and allows for the lessening of design timing margins, thus reducing the overall design costs.
ISSN:1930-8841
2374-8036
DOI:10.1109/IIRW.2012.6468950