3D simulation of substrate noise coupling from Through Silicon Via (TSV) and noise isolation methods

This paper presents simulation results of substrate noise coupling between through silicon via (TSV) and MOSFET. Electrical noise coupling through coexistence of junction capacitances and threshold modulation in substrate is studied and discussed through 2D and 3D transient analyses in this paper. F...

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Bibliographic Details
Main Authors: Lin, Leo Jyun-Hong, Hsiao-Pu Chang, Tzong-Lin Wu, Yih-Peng Chiou
Format: Conference Proceeding
Language:English
Subjects:
Noise
noise isolation
Semiconductor process modeling
substrate noise coupling
Substrates
Switches
Through-silicon via (TSV)
transient analysis
Online Access:Request full text
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Summary:This paper presents simulation results of substrate noise coupling between through silicon via (TSV) and MOSFET. Electrical noise coupling through coexistence of junction capacitances and threshold modulation in substrate is studied and discussed through 2D and 3D transient analyses in this paper. Furthermore, noise isolation methods including guard rings and grounded shield TSV are incorporated to improve the noise decoupling and are examined to verify their effectiveness.
ISSN:2151-1225
2151-1233
DOI:10.1109/EDAPS.2012.6469415