1.2 GS/s Hadamard Transform front-end for compressive sensing in 65nm CMOS

In this paper we present a digitally assisted front-end that performs analog computation of the Walsh Hadamard Transform (WHT) for GHz ADCs using compressive sensing to reduce power. The circuit consumes 11.2 mW of power while sampling at 1.2 GHz. The achieved compression rate assuming an ideal ADC...

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Bibliographic Details
Main Authors: Khan, O. U., Wentzloff, D. D.
Format: Conference Proceeding
Language:English
Subjects:
Clocks
CMOS integrated circuits
Compressed sensing
Current measurement
Mean square error methods
Power demand
sub-Nyquist ADC
Transforms
Walsh Hadamard Transform
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Description
Summary:In this paper we present a digitally assisted front-end that performs analog computation of the Walsh Hadamard Transform (WHT) for GHz ADCs using compressive sensing to reduce power. The circuit consumes 11.2 mW of power while sampling at 1.2 GHz. The achieved compression rate assuming an ideal ADC is 59.4% with a mean square error of 0.3%. Comparison with the Nyquist ADC shows that using the sub-Nyquist ADC with the proposed WHT front-end reduces power by a factor of about 6x.
ISSN:2164-2958
2164-2974
DOI:10.1109/RWS.2013.6486681