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Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs
In switched-capacitor circuits like ΔΣ modulators and pipelined ADCs, accurately transferring voltages in sampled-data form, regardless of opamp gain and nonlinearity, has been one of the most challenging issues that analog designers have faced. To date, it has been difficult to achieve high resolut...
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Main Authors: | , , , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | In switched-capacitor circuits like ΔΣ modulators and pipelined ADCs, accurately transferring voltages in sampled-data form, regardless of opamp gain and nonlinearity, has been one of the most challenging issues that analog designers have faced. To date, it has been difficult to achieve high resolution with pipelined ADCs operating at low voltages due to gain and nonlinearity constraints. Digital means of calibration have been suggested to correct opamp nonlinearity, relying on weakly nonlinear transfer functions with coefficients that may need a long time to measure accurately. Alternative types of ADCs that use no opamps, such as successive-approximation, time-domain, and comparator-based designs, have been gaining in popularity. In this paper we implement an inherently exact residue pipelining scheme that is not impaired by opamp gain and nonlinearity. Unlike other calibration methods that sort out errors after they occur, the proposed circuit performs no post analog or digital signal processing, as gain and nonlinearity errors are eliminated entirely at their very sources. |
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ISSN: | 0193-6530 2376-8606 |
DOI: | 10.1109/ISSCC.2013.6487736 |