Performance bound and yield analysis for analog circuits under process variations

Yield estimation for analog integrated circuits are crucial for analog circuit design and optimization in the presence of process variations. In this paper, we present a novel analog yield estimation method based on performance bound analysis technique in frequency domain. The new method first deriv...

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Bibliographic Details
Main Authors: Xue-Xin Liu, Palma-Rodriguez, A. A., Rodriguez-Chavez, S., Tan, Sheldon X.-D, Tlelo-Cuautle, E., Yici Cai
Format: Conference Proceeding
Language:English
Subjects:
Analog circuits
Frequency-domain analysis
Gain
Monte Carlo methods
Optimization
Transfer functions
Yield estimation
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Summary:Yield estimation for analog integrated circuits are crucial for analog circuit design and optimization in the presence of process variations. In this paper, we present a novel analog yield estimation method based on performance bound analysis technique in frequency domain. The new method first derives the transfer functions of linear (or linearized) analog circuits via a graph-based symbolic analysis method. Then frequency response bounds of the transfer functions in terms of magnitude and phase are obtained by a nonlinear constrained optimization technique. To predict yield rate, bound information are employed to calculate Gaussian distribution functions. Experimental results show that the new method can achieve similar accuracy while delivers 20 times speedup over Monte Carlo simulation of HSPICE on some typical analog circuits.
ISSN:2153-6961
2153-697X
DOI:10.1109/ASPDAC.2013.6509692