Intrinsic dielectric stack reliability of a high performance bulk planar 20nm replacement gate high-k metal gate technology and comparison to 28nm gate first high-k metal gate process

We compare the intrinsic reliability of the dielectric stack of a high performance bulk planar 20nm replacement gate technology to the reliability of high performance bulk planar 28 nm gate first high-k metal gate (HKMG) technology, developed within the IBM Alliance. Comparable N/PFET TDDB and compa...

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Main Authors: McMahon, W., Tian, C., Uppal, S., Kothari, H., Jin, M., LaRosa, G., Nigam, T., Kerber, A., Linder, B. P., Cartier, E., Lai, W. L., Liu, Y., Ramachandran, R., Kwon, U., Parameshwaran, B., Krishnan, S., Narayanan, V.
Format: Conference Proceeding
Language:English
Subjects:
Dielectrics
high-k gate dielectrics
Logic gates
Metals
Performance evaluation
Reliability
semiconductor device reliability
Stress
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Summary:We compare the intrinsic reliability of the dielectric stack of a high performance bulk planar 20nm replacement gate technology to the reliability of high performance bulk planar 28 nm gate first high-k metal gate (HKMG) technology, developed within the IBM Alliance. Comparable N/PFET TDDB and comparable/improved NFET PBTI are shown to be achievable for similar T inv . The choice to not include channel silicon germanium as a PFET performance element in the 20nm technology impact NBTI, driving a potential tradeoff between NBTI and PBTI. The complexity of integrating such performance elements while accounting for reliability/performance tradeoffs demands their selection during technology definition with due consideration to realistic product usage conditions.
ISSN:1541-7026
1938-1891
DOI:10.1109/IRPS.2013.6532016