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Self-aligned through silicon vias in ultra-thin chips for 3D-integration
Here, we present a new concept for enabling the formation of TSVs in ultra-thin chips fabricated by using the Chipfilm TM technology. In this technology a buried cavity is created underneath a Si-membrane which is attached to the substrate by vertical silicon anchors. By applying thermal oxidation,...
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Main Authors: | , , , |
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Format: | Conference Proceeding |
Language: | English |
Online Access: | Request full text |
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Summary: | Here, we present a new concept for enabling the formation of TSVs in ultra-thin chips fabricated by using the Chipfilm TM technology. In this technology a buried cavity is created underneath a Si-membrane which is attached to the substrate by vertical silicon anchors. By applying thermal oxidation, the side walls of these anchors and the narrow cavity are passivated. Due to the high selectivity of the silicon via etching process the oxidized silicon anchors and chip backside can be exploited for creating self-aligned TSVs. Accordingly, a seamless oxide isolation at the chip backside and inside the TSVs is provided. |
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DOI: | 10.1109/ESTC.2012.6542114 |