Numerical method for DC fault analysis simplification and simulation time reduction

This paper presents a numerical approach to DC fault analysis of analog circuits that improves the total computational time and reduces the total complexity of such analysis. The reduction is achieved by utilization of calculus that can substitute conventional simulations and thus, significantly red...

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Bibliographic Details
Main Authors: Brenkus, J., Stopjakova, V., Gyepes, G.
Format: Conference Proceeding
Language:English
Subjects:
analog circuit
Analytical models
Circuit faults
Computational modeling
fault analysis
Integrated circuit modeling
Mathematical model
Numerical models
Resistance
simulation
test
Online Access:Request full text
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Summary:This paper presents a numerical approach to DC fault analysis of analog circuits that improves the total computational time and reduces the total complexity of such analysis. The reduction is achieved by utilization of calculus that can substitute conventional simulations and thus, significantly reducing computational time. A detailed description of the approach including its mathematical background is presented. Accuracy and time efficiency are demonstrated on a test circuit.
DOI:10.1109/DDECS.2013.6549811