Design and fabrication of ultra low-loss, high-performance 3D chip-chip air-clad interconnect pathway

In this study, we are pursuing an ultra low-loss interconnect pathway for 3D chip-chip connectivity, incorporating air-clad planar interconnects, air-clad TSVs, and gradual vertical-horizontal transitions. The motivation is to create an air-gap technology that offers the lowest possible effective k-...

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Bibliographic Details
Main Authors: Uzunlar, Erdal, Sharma, Rohit, Saha, Rajarshi, Kumar, Vachan, Bashirullah, Rizwan, Naeemi, Azad, Kohl, Paul A.
Format: Conference Proceeding
Language:English
Subjects:
Air gaps
Dielectric losses
Fabrication
Integrated circuit interconnections
Materials
Through-silicon vias
Online Access:Request full text
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Summary:In this study, we are pursuing an ultra low-loss interconnect pathway for 3D chip-chip connectivity, incorporating air-clad planar interconnects, air-clad TSVs, and gradual vertical-horizontal transitions. The motivation is to create an air-gap technology that offers the lowest possible effective k-value and near zero loss tangent minimizing the dielectric loss. The design and modeling of air-gap interconnection is presented. The fabrication challenges in air-clad interconnect lines are discussed. A monolithic inverted air-gap horizontal transmission line structure is proposed as a means for further decreasing the dielectric loss. Extension of air-clad TSV technology for optical transmission is briefly discussed.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.2013.6575760