Loading…
Distributed arithmetic based filters for satellite video signals demodulation
The paper proposes a method to use distributed arithmetic (DA) based filters to demodulate video signals on satellites. The demodulator uses a mixer, carrier recovery circuit, symbol recovery circuit and a Root raised cosine filter designed on DA based technique to implement the algorithm. Typical b...
Saved in:
Main Authors: | , , |
---|---|
Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | |
---|---|
cites | |
container_end_page | 119 |
container_issue | |
container_start_page | 115 |
container_title | |
container_volume | |
creator | Srividya, P. Nataraj, K. R. Rekha, K. R. |
description | The paper proposes a method to use distributed arithmetic (DA) based filters to demodulate video signals on satellites. The demodulator uses a mixer, carrier recovery circuit, symbol recovery circuit and a Root raised cosine filter designed on DA based technique to implement the algorithm. Typical binary digital rates for digitized video are 3-4Mbps. To demodulate such signals, the number of MAC operations required by the filter is more. DA usage eliminates the need of multipliers when implementing MAC. This increases the operational speed and results in high filter throughput. The basic blocks of the demodulator are designed using VHDL and synthesized using Xilinx ISE 10.1. |
doi_str_mv | 10.1109/iccsp.2013.6577027 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6577027</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6577027</ieee_id><sourcerecordid>6577027</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-eae672533a37b79938ee1e020eeb50cf0f621e11be294795046ef858afdbf2393</originalsourceid><addsrcrecordid>eNpVkM1KxDAUhSMiKGNfQDd5gdabpEmapYy_MOJG10PS3uiVdjokGcG3t-BsXB3OB99ZHMauBDRCgLuhvs_7RoJQjdHWgrQnrHK2E62xqu1Mq0__dS3PWZXzFwAsvhFWXrCXO8olUTgUHLhPVD4nLNTz4PMCIo0FU-ZxTjz7guNIBfk3DTjzTB87P2Y-4DQPh9EXmneX7CwuDKtjrtj7w_3b-qnevD4-r283NQmrS40ejZVaKa9ssM6pDlEgSEAMGvoI0UiBQgSUrrVOQ2swdrrzcQhRKqdW7PpvlxBxu080-fSzPZ6gfgG0_1G_</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Distributed arithmetic based filters for satellite video signals demodulation</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Srividya, P. ; Nataraj, K. R. ; Rekha, K. R.</creator><creatorcontrib>Srividya, P. ; Nataraj, K. R. ; Rekha, K. R.</creatorcontrib><description>The paper proposes a method to use distributed arithmetic (DA) based filters to demodulate video signals on satellites. The demodulator uses a mixer, carrier recovery circuit, symbol recovery circuit and a Root raised cosine filter designed on DA based technique to implement the algorithm. Typical binary digital rates for digitized video are 3-4Mbps. To demodulate such signals, the number of MAC operations required by the filter is more. DA usage eliminates the need of multipliers when implementing MAC. This increases the operational speed and results in high filter throughput. The basic blocks of the demodulator are designed using VHDL and synthesized using Xilinx ISE 10.1.</description><identifier>ISBN: 9781467348652</identifier><identifier>ISBN: 1467348651</identifier><identifier>EISBN: 9781467348645</identifier><identifier>EISBN: 1467348643</identifier><identifier>EISBN: 146734866X</identifier><identifier>EISBN: 9781467348669</identifier><identifier>DOI: 10.1109/iccsp.2013.6577027</identifier><language>eng</language><publisher>IEEE</publisher><subject>Demodulation ; Demodulation Digital filters ; Distributed arithmetic ; Field programmable gate arrays ; Finite impulse response filters ; IIR filters ; On board processing satellites ; Phase shift keying ; Satellites</subject><ispartof>2013 International Conference on Communication and Signal Processing, 2013, p.115-119</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6577027$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6577027$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Srividya, P.</creatorcontrib><creatorcontrib>Nataraj, K. R.</creatorcontrib><creatorcontrib>Rekha, K. R.</creatorcontrib><title>Distributed arithmetic based filters for satellite video signals demodulation</title><title>2013 International Conference on Communication and Signal Processing</title><addtitle>iccsp</addtitle><description>The paper proposes a method to use distributed arithmetic (DA) based filters to demodulate video signals on satellites. The demodulator uses a mixer, carrier recovery circuit, symbol recovery circuit and a Root raised cosine filter designed on DA based technique to implement the algorithm. Typical binary digital rates for digitized video are 3-4Mbps. To demodulate such signals, the number of MAC operations required by the filter is more. DA usage eliminates the need of multipliers when implementing MAC. This increases the operational speed and results in high filter throughput. The basic blocks of the demodulator are designed using VHDL and synthesized using Xilinx ISE 10.1.</description><subject>Demodulation</subject><subject>Demodulation Digital filters</subject><subject>Distributed arithmetic</subject><subject>Field programmable gate arrays</subject><subject>Finite impulse response filters</subject><subject>IIR filters</subject><subject>On board processing satellites</subject><subject>Phase shift keying</subject><subject>Satellites</subject><isbn>9781467348652</isbn><isbn>1467348651</isbn><isbn>9781467348645</isbn><isbn>1467348643</isbn><isbn>146734866X</isbn><isbn>9781467348669</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2013</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpVkM1KxDAUhSMiKGNfQDd5gdabpEmapYy_MOJG10PS3uiVdjokGcG3t-BsXB3OB99ZHMauBDRCgLuhvs_7RoJQjdHWgrQnrHK2E62xqu1Mq0__dS3PWZXzFwAsvhFWXrCXO8olUTgUHLhPVD4nLNTz4PMCIo0FU-ZxTjz7guNIBfk3DTjzTB87P2Y-4DQPh9EXmneX7CwuDKtjrtj7w_3b-qnevD4-r283NQmrS40ejZVaKa9ssM6pDlEgSEAMGvoI0UiBQgSUrrVOQ2swdrrzcQhRKqdW7PpvlxBxu080-fSzPZ6gfgG0_1G_</recordid><startdate>201304</startdate><enddate>201304</enddate><creator>Srividya, P.</creator><creator>Nataraj, K. R.</creator><creator>Rekha, K. R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201304</creationdate><title>Distributed arithmetic based filters for satellite video signals demodulation</title><author>Srividya, P. ; Nataraj, K. R. ; Rekha, K. R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-eae672533a37b79938ee1e020eeb50cf0f621e11be294795046ef858afdbf2393</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Demodulation</topic><topic>Demodulation Digital filters</topic><topic>Distributed arithmetic</topic><topic>Field programmable gate arrays</topic><topic>Finite impulse response filters</topic><topic>IIR filters</topic><topic>On board processing satellites</topic><topic>Phase shift keying</topic><topic>Satellites</topic><toplevel>online_resources</toplevel><creatorcontrib>Srividya, P.</creatorcontrib><creatorcontrib>Nataraj, K. R.</creatorcontrib><creatorcontrib>Rekha, K. R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Srividya, P.</au><au>Nataraj, K. R.</au><au>Rekha, K. R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Distributed arithmetic based filters for satellite video signals demodulation</atitle><btitle>2013 International Conference on Communication and Signal Processing</btitle><stitle>iccsp</stitle><date>2013-04</date><risdate>2013</risdate><spage>115</spage><epage>119</epage><pages>115-119</pages><isbn>9781467348652</isbn><isbn>1467348651</isbn><eisbn>9781467348645</eisbn><eisbn>1467348643</eisbn><eisbn>146734866X</eisbn><eisbn>9781467348669</eisbn><abstract>The paper proposes a method to use distributed arithmetic (DA) based filters to demodulate video signals on satellites. The demodulator uses a mixer, carrier recovery circuit, symbol recovery circuit and a Root raised cosine filter designed on DA based technique to implement the algorithm. Typical binary digital rates for digitized video are 3-4Mbps. To demodulate such signals, the number of MAC operations required by the filter is more. DA usage eliminates the need of multipliers when implementing MAC. This increases the operational speed and results in high filter throughput. The basic blocks of the demodulator are designed using VHDL and synthesized using Xilinx ISE 10.1.</abstract><pub>IEEE</pub><doi>10.1109/iccsp.2013.6577027</doi><tpages>5</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISBN: 9781467348652 |
ispartof | 2013 International Conference on Communication and Signal Processing, 2013, p.115-119 |
issn | |
language | eng |
recordid | cdi_ieee_primary_6577027 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Demodulation Demodulation Digital filters Distributed arithmetic Field programmable gate arrays Finite impulse response filters IIR filters On board processing satellites Phase shift keying Satellites |
title | Distributed arithmetic based filters for satellite video signals demodulation |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T22%3A49%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Distributed%20arithmetic%20based%20filters%20for%20satellite%20video%20signals%20demodulation&rft.btitle=2013%20International%20Conference%20on%20Communication%20and%20Signal%20Processing&rft.au=Srividya,%20P.&rft.date=2013-04&rft.spage=115&rft.epage=119&rft.pages=115-119&rft.isbn=9781467348652&rft.isbn_list=1467348651&rft_id=info:doi/10.1109/iccsp.2013.6577027&rft.eisbn=9781467348645&rft.eisbn_list=1467348643&rft.eisbn_list=146734866X&rft.eisbn_list=9781467348669&rft_dat=%3Cieee_6IE%3E6577027%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-eae672533a37b79938ee1e020eeb50cf0f621e11be294795046ef858afdbf2393%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6577027&rfr_iscdi=true |