At-speed BIST for interposer wires supporting on-the-spot diagnosis

Testing the speed of post-bond interposer wires in a 2.5-D stacked IC is essential for silicon debugging, yield learning, and even for fault tolerance. In this paper, we present a novel at-speed test technique called Pulse-Vanishing test (PV-test), in which a short-duration pulse signal is applied t...

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Bibliographic Details
Main Authors: Shi-Yu Huang, Jeo-Yen Lee, Kun-Han Tsai, Wu-Tung Cheng
Format: Conference Proceeding
Language:English
Subjects:
2.5-D Stacked IC
At-Speed Test
Built-In Self-Test
Control systems
Decision support systems
Delay Fault
Interposer
Post-bond Test
Pulse-Vanishing Test
Receivers
Silicon
Testing
Wires
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Description
Summary:Testing the speed of post-bond interposer wires in a 2.5-D stacked IC is essential for silicon debugging, yield learning, and even for fault tolerance. In this paper, we present a novel at-speed test technique called Pulse-Vanishing test (PV-test), in which a short-duration pulse signal is applied to an interposer wire under test at the d river end. If the pulse signal can successfully propagate through the interposer wire and reach the other end, then the interposer wire is considered fault-free. Otherwise, it indicates the presence of a delay fault. This new test technique has several technical merits. For example, the Design-for-Testability (DfT) circuit for an interposer wire is similar to the boundary scan cell and can be controlled through scan chain. Also, it can be easily adapted to perform at-speed Built-In Self-Test (BIST) supporting on-the-spot diagnosis.
ISSN:1942-9398
1942-9401
DOI:10.1109/IOLTS.2013.6604053